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[core] fixed a critical bug

This commit is contained in:
tangxifan 2023-05-03 21:46:35 +08:00
parent 6c48c57421
commit cb0e6b9e17
1 changed files with 1 additions and 1 deletions
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2
openfpga/src/fabric/build_grid_modules.cpp
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@ -1093,7 +1093,7 @@ static void build_physical_tile_module(
* it as a mode under a <pb_type>
*/
for (const t_sub_tile& sub_tile : phy_block_type->sub_tiles) {
for (int iz = sub_tile.capacity.low; iz < sub_tile.capacity.high; ++iz) {
for (int iz = sub_tile.capacity.low; iz < sub_tile.capacity.high + 1; ++iz) {
VTR_ASSERT(1 == sub_tile.equivalent_sites.size());
t_logical_block_type_ptr lb_type = sub_tile.equivalent_sites[0];
/* Bypass empty pb_graph */