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[FPGA-bitstream] add timer to computing intensive functions

This commit is contained in:
tangxifan 2022-05-25 14:52:32 +08:00
parent 9832722056
commit bf1a81fbb5
2 changed files with 3 additions and 0 deletions
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1
openfpga/src/fpga_bitstream/write_text_fabric_bitstream.cpp
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@ -445,6 +445,7 @@ int write_fabric_bitstream_to_text_file(const BitstreamManager& bitstream_manage
status = write_memory_bank_shift_register_fabric_bitstream_to_text_file(fp,
apply_fast_configuration,
bit_value_to_skip,
fabric_bitstream,
blwl_sr_banks,
keep_dont_care_bits);

2
openfpga/src/utils/fabric_bitstream_utils.cpp
View File

@ -10,6 +10,7 @@
/* Headers from vtrutil library */
#include "vtr_assert.h"
#include "vtr_log.h"
#include "vtr_time.h"
/* Headers from openfpgautil library */
#include "openfpga_reserved_words.h"
@ -506,6 +507,7 @@ MemoryBankShiftRegisterFabricBitstream build_memory_bank_shift_register_fabric_b
const bool& fast_configuration,
const bool& bit_value_to_skip,
const char& dont_care_bit) {
vtr::ScopedStartFinishTimer timer("Reshape fabric bitstream for memory bank using shift registers");
MemoryBankFlattenFabricBitstream raw_fabric_bits = build_memory_bank_flatten_fabric_bitstream(fabric_bitstream, fast_configuration, bit_value_to_skip, dont_care_bit);
MemoryBankShiftRegisterFabricBitstream fabric_bits;