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Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb

This commit is contained in:
Baudouin Chauviere 2019-06-20 14:11:03 -06:00
parent 3bd6c40a10 a7502bb43b
commit be25b6dd66
1 changed files with 3 additions and 1 deletions
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2
vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_pbtypes.c
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@ -1767,9 +1767,11 @@ void dump_verilog_phy_pb_graph_node_rec(t_sram_orgz_info* cur_sram_orgz_info,
/* Definition ends*/ /* Definition ends*/
/* Local wires for memory configurations */ /* Local wires for memory configurations */
if (0 < num_conf_bits) {
dump_verilog_sram_config_bus_internal_wires(fp, cur_sram_orgz_info, dump_verilog_sram_config_bus_internal_wires(fp, cur_sram_orgz_info,
stamped_sram_cnt, stamped_sram_cnt,
stamped_sram_cnt + num_conf_bits - 1); stamped_sram_cnt + num_conf_bits - 1);
}
/* Quote all child pb_types */ /* Quote all child pb_types */
for (ipb = 0; ipb < cur_pb_type->modes[mode_index].num_pb_type_children; ipb++) { for (ipb = 0; ipb < cur_pb_type->modes[mode_index].num_pb_type_children; ipb++) {