[Test] Remove routing test from quicklogic's flow test

This commit is contained in:
tangxifan 2021-02-22 10:22:47 -07:00
parent 2dbdc2644f
commit bc8aa0ebc6
1 changed files with 0 additions and 3 deletions

View File

@ -28,7 +28,6 @@ bench0=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/io_tc1/rt
bench1=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/unsigned_mult_80/rtl/*.v
bench2=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/bin2bcd/bin2bcd.v
bench3=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/counter/counter.v
bench4=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/routing_test/routing_test.v
bench5=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/rs_decoder/rtl/rs_decoder.v
bench6=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/simon_bit_serial/rtl/*.v
bench7=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/sha256/rtl/*.v
@ -56,8 +55,6 @@ bench2_top = bin2bcd
bench2_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3.ys
bench3_top = counter
bench3_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3.ys
bench4_top = routing_test
bench4_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3.ys
bench5_top = rs_decoder_top
bench5_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3.ys
bench6_top = top_module