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[HDL] Patch the superLUT HDL code to be consistent with (qlf_k4n8_sim.v)[https://github.com/lnsharma/yosys/blob/add_qlf_k4n8_dev/techlibs/quicklogic/qlf_k4n8_cells_sim.v]

This commit is contained in:
tangxifan 2021-03-11 15:23:14 -07:00
parent baf162e401
commit bb2a02c9ad
1 changed files with 2 additions and 2 deletions
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4
openfpga_flow/openfpga_cell_library/verilog/frac_lut4_arith.v
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@ -63,7 +63,7 @@ wire [0:0] sky130_fd_sc_hd__or2_1_0_X;
.A(in[1]), .A(in[1]),
.Y(sky130_fd_sc_hd__inv_1_1_Y[0])); .Y(sky130_fd_sc_hd__inv_1_1_Y[0]));
assign arith_in2 = mode[0] ? in[2] : cin; assign arith_in2 = mode[0] ? cin : in[2];
sky130_fd_sc_hd__inv_1 sky130_fd_sc_hd__inv_1_2_ ( sky130_fd_sc_hd__inv_1 sky130_fd_sc_hd__inv_1_2_ (
.A(arith_in2), .A(arith_in2),
@ -82,7 +82,7 @@ wire [0:0] sky130_fd_sc_hd__or2_1_0_X;
.X(sky130_fd_sc_hd__buf_2_1_X[0])); .X(sky130_fd_sc_hd__buf_2_1_X[0]));
sky130_fd_sc_hd__buf_2 sky130_fd_sc_hd__buf_2_2_ ( sky130_fd_sc_hd__buf_2 sky130_fd_sc_hd__buf_2_2_ (
.A(in[2]), .A(arith_in2),
.X(sky130_fd_sc_hd__buf_2_2_X[0])); .X(sky130_fd_sc_hd__buf_2_2_X[0]));
sky130_fd_sc_hd__buf_2 sky130_fd_sc_hd__buf_2_3_ ( sky130_fd_sc_hd__buf_2 sky130_fd_sc_hd__buf_2_3_ (