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[Test] Added the new test cases to regression tests

This commit is contained in:
tangxifan 2021-06-27 19:58:15 -06:00
parent 6f0600e17f
commit b4c587f10b
1 changed files with 4 additions and 0 deletions
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4
openfpga_flow/regression_test_scripts/fpga_verilog_reg_test.sh
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@ -136,3 +136,7 @@ run-task fpga_verilog/fully_connected_output_crossbar --debug --show_thread_logs
echo -e "Testing through channels in tileable routing";
run-task fpga_verilog/thru_channel/thru_narrow_tile --debug --show_thread_logs
run-task fpga_verilog/thru_channel/thru_wide_tile --debug --show_thread_logs
echo -e "Testing the generation of preconfigured fabric wrapper for different HDL simulators";
run-task fpga_verilog/verilog_netlist_formats/embed_bitstream_none --debug --show_thread_logs
run-task fpga_verilog/verilog_netlist_formats/embed_bitstream_modelsim --debug --show_thread_logs