[FPGA-Bitstream] Enable fast configuration for QuickLogic memory banks
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@ -190,11 +190,12 @@ int write_memory_bank_fabric_bitstream_to_text_file(std::fstream& fp,
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*******************************************************************/
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static
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int write_memory_bank_flatten_fabric_bitstream_to_text_file(std::fstream& fp,
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const bool& fast_configuration,
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const bool& bit_value_to_skip,
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const FabricBitstream& fabric_bitstream) {
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int status = 0;
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MemoryBankFlattenFabricBitstream fabric_bits = build_memory_bank_flatten_fabric_bitstream(fabric_bitstream, bit_value_to_skip);
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MemoryBankFlattenFabricBitstream fabric_bits = build_memory_bank_flatten_fabric_bitstream(fabric_bitstream, fast_configuration, bit_value_to_skip);
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/* The address sizes and data input sizes are the same across any element,
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* just get it from the 1st element to save runtime
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@ -234,11 +235,12 @@ int write_memory_bank_flatten_fabric_bitstream_to_text_file(std::fstream& fp,
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*******************************************************************/
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static
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int write_memory_bank_shift_register_fabric_bitstream_to_text_file(std::fstream& fp,
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const bool& fast_configuration,
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const bool& bit_value_to_skip,
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const FabricBitstream& fabric_bitstream) {
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int status = 0;
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MemoryBankShiftRegisterFabricBitstream fabric_bits = build_memory_bank_shift_register_fabric_bitstream(fabric_bitstream, bit_value_to_skip);
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MemoryBankShiftRegisterFabricBitstream fabric_bits = build_memory_bank_shift_register_fabric_bitstream(fabric_bitstream, fast_configuration, bit_value_to_skip);
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/* Output information about how to intepret the bitstream */
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fp << "// Bitstream word count: " << fabric_bits.num_words() << std::endl;
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@ -415,11 +417,13 @@ int write_fabric_bitstream_to_text_file(const BitstreamManager& bitstream_manage
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fabric_bitstream);
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} else if (BLWL_PROTOCOL_FLATTEN == config_protocol.bl_protocol_type()) {
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status = write_memory_bank_flatten_fabric_bitstream_to_text_file(fp,
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apply_fast_configuration,
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bit_value_to_skip,
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fabric_bitstream);
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} else {
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VTR_ASSERT(BLWL_PROTOCOL_SHIFT_REGISTER == config_protocol.bl_protocol_type());
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status = write_memory_bank_shift_register_fabric_bitstream_to_text_file(fp,
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apply_fast_configuration,
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bit_value_to_skip,
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fabric_bitstream);
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}
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@ -862,7 +862,7 @@ size_t calculate_num_config_clock_cycles(const ConfigProtocol& config_protocol,
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100. * ((float)num_config_clock_cycles / (float)full_num_config_clock_cycles - 1.));
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}
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} else if (BLWL_PROTOCOL_FLATTEN == config_protocol.bl_protocol_type()) {
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num_config_clock_cycles = 1 + build_memory_bank_flatten_fabric_bitstream(fabric_bitstream, bit_value_to_skip).size();
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num_config_clock_cycles = 1 + build_memory_bank_flatten_fabric_bitstream(fabric_bitstream, fast_configuration, bit_value_to_skip).size();
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} else if (BLWL_PROTOCOL_SHIFT_REGISTER == config_protocol.bl_protocol_type()) {
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/* TODO */
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}
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@ -187,6 +187,7 @@ void print_verilog_full_testbench_ql_memory_bank_flatten_bitstream(std::fstream&
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/* Reorganize the fabric bitstream by the same address across regions */
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MemoryBankFlattenFabricBitstream fabric_bits_by_addr = build_memory_bank_flatten_fabric_bitstream(fabric_bitstream,
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fast_configuration,
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bit_value_to_skip);
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/* Feed address and data input pair one by one
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@ -233,14 +233,15 @@ MemoryBankFabricBitstream build_memory_bank_fabric_bitstream_by_address(const Fa
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}
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MemoryBankFlattenFabricBitstream build_memory_bank_flatten_fabric_bitstream(const FabricBitstream& fabric_bitstream,
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const bool& fast_configuration,
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const bool& bit_value_to_skip) {
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/* Build the bitstream by each region, here we use (WL, BL) pairs when storing bitstreams */
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vtr::vector<FabricBitRegionId, std::map<std::string, std::string>> fabric_bits_per_region;
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fabric_bits_per_region.resize(fabric_bitstream.num_regions());
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for (const FabricBitRegionId& region : fabric_bitstream.regions()) {
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for (const FabricBitId& bit_id : fabric_bitstream.region_bits(region)) {
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/* Skip din because they should be pre-configured through programming reset/set */
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if (fabric_bitstream.bit_din(bit_id) == bit_value_to_skip) {
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/* Only when fast configuration is required, skip din because they should be pre-configured through programming reset/set */
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if (fast_configuration && fabric_bitstream.bit_din(bit_id) == bit_value_to_skip) {
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continue;
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}
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/* Create string for BL address */
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@ -374,9 +375,10 @@ std::vector<std::string> reshape_bitstream_vectors_to_last_element(const std::ve
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}
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MemoryBankShiftRegisterFabricBitstream build_memory_bank_shift_register_fabric_bitstream(const FabricBitstream& fabric_bitstream,
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const bool& fast_configuration,
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//const std::array<MemoryBankShiftRegisterBanks, 2>& blwl_sr_banks,
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const bool& bit_value_to_skip) {
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MemoryBankFlattenFabricBitstream raw_fabric_bits = build_memory_bank_flatten_fabric_bitstream(fabric_bitstream, bit_value_to_skip);
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MemoryBankFlattenFabricBitstream raw_fabric_bits = build_memory_bank_flatten_fabric_bitstream(fabric_bitstream, fast_configuration, bit_value_to_skip);
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MemoryBankShiftRegisterFabricBitstream fabric_bits;
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/* Iterate over each word */
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@ -62,6 +62,7 @@ size_t find_frame_based_fast_configuration_fabric_bitstream_size(const FabricBit
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* @note the std::map may cause large memory footprint for large bitstream databases!
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*******************************************************************/
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MemoryBankFlattenFabricBitstream build_memory_bank_flatten_fabric_bitstream(const FabricBitstream& fabric_bitstream,
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const bool& fast_configuration,
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const bool& bit_value_to_skip);
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/********************************************************************
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@ -93,6 +94,7 @@ MemoryBankFlattenFabricBitstream build_memory_bank_flatten_fabric_bitstream(cons
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* @note the std::map may cause large memory footprint for large bitstream databases!
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*******************************************************************/
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MemoryBankShiftRegisterFabricBitstream build_memory_bank_shift_register_fabric_bitstream(const FabricBitstream& fabric_bitstream,
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const bool& fast_configuration,
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//const std::array<MemoryBankShiftRegisterBanks, 2>& blwl_sr_banks,
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const bool& bit_value_to_skip);
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