[arch language] Now circuit library will automatically identify the default circuit model if needed

This commit is contained in:
tangxifan 2020-08-23 14:06:03 -06:00
parent b83319bf14
commit 9c66a35bf6
3 changed files with 25 additions and 0 deletions

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@ -2,6 +2,7 @@
#include <algorithm> #include <algorithm>
#include "vtr_assert.h" #include "vtr_assert.h"
#include "vtr_log.h"
#include "openfpga_port_parser.h" #include "openfpga_port_parser.h"
#include "circuit_library.h" #include "circuit_library.h"
@ -2108,6 +2109,23 @@ void CircuitLibrary::build_timing_graphs() {
return; return;
} }
/* Automatically identify the default models for each type*/
void CircuitLibrary::auto_detect_default_models() {
/* Go through the model fast look-up */
for (const auto& curr_type_models : model_lookup_) {
if ( (1 == curr_type_models.size())
&& (false == model_is_default(curr_type_models[0]))) {
/* This is the only model in this type,
* it is safe to set it to be default
* Give a warning for users
*/
set_model_is_default(curr_type_models[0], true);
VTR_LOG_WARN("Automatically set circuit model '%s' to be default in its type.\n",
model_name(curr_type_models[0]).c_str());
}
}
}
/************************************************************************ /************************************************************************
* Internal mutators: build timing graphs * Internal mutators: build timing graphs
***********************************************************************/ ***********************************************************************/

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@ -461,6 +461,10 @@ class CircuitLibrary {
public: /* Public Mutators: builders */ public: /* Public Mutators: builders */
void build_model_links(); void build_model_links();
void build_timing_graphs(); void build_timing_graphs();
/* Automatically identify the default models for each type,
* suggest to do this after circuit library is built
*/
void auto_detect_default_models();
public: /* Internal mutators: build timing graphs */ public: /* Internal mutators: build timing graphs */
void add_edge(const CircuitModelId& model_id, void add_edge(const CircuitModelId& model_id,
const CircuitPortId& from_port, const size_t& from_pin, const CircuitPortId& from_port, const size_t& from_pin,

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@ -52,6 +52,9 @@ openfpga::Arch read_xml_openfpga_arch(const char* arch_file_name) {
auto xml_circuit_models = get_single_child(xml_openfpga_arch, "circuit_library", loc_data); auto xml_circuit_models = get_single_child(xml_openfpga_arch, "circuit_library", loc_data);
openfpga_arch.circuit_lib = read_xml_circuit_library(xml_circuit_models, loc_data); openfpga_arch.circuit_lib = read_xml_circuit_library(xml_circuit_models, loc_data);
/* Automatically identify the default models for circuit library */
openfpga_arch.circuit_lib.auto_detect_default_models();
/* Build the internal links for the circuit library */ /* Build the internal links for the circuit library */
openfpga_arch.circuit_lib.build_model_links(); openfpga_arch.circuit_lib.build_model_links();