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OpenFPGA
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add test case for openfpga shell

This commit is contained in:
tangxifan 2020-01-26 17:30:46 -07:00
parent 7d4b07421d
commit 93ab4b8dd2
3 changed files with 20627 additions and 0 deletions
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openfpga/test_arch/k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml Normal file
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openfpga/test_blif/riscv_core_lut6.blif Normal file
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openfpga/test_script/riscv_core.openfpga Normal file
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# Run VPR for the RISC-V core
vpr ./test_arch/k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml ./test_blif/riscv_core_lut6.blif