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rename source files to be what they are actually doing

This commit is contained in:
tangxifan 2019-11-05 12:18:23 -07:00
parent aaaf7a0d19
commit 8ef9e994d8
4 changed files with 5 additions and 5 deletions
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2
vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_api.c
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@ -61,7 +61,7 @@
#include "verilog_sdc.h" #include "verilog_sdc.h"
#include "verilog_formality_autodeck.h" #include "verilog_formality_autodeck.h"
#include "verilog_sdc_pb_types.h" #include "verilog_sdc_pb_types.h"
#include "verilog_include_netlists.h" #include "verilog_auxiliary_netlists.h"
#include "simulation_info_writer.h" #include "simulation_info_writer.h"
#include "verilog_api.h" #include "verilog_api.h"

2
vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_include_netlists.cpp → vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_auxiliary_netlists.cpp
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@ -13,7 +13,7 @@
#include "fpga_x2p_naming.h" #include "fpga_x2p_naming.h"
#include "verilog_writer_utils.h" #include "verilog_writer_utils.h"
#include "verilog_include_netlists.h" #include "verilog_auxiliary_netlists.h"
/******************************************************************** /********************************************************************
* Local constant variables * Local constant variables

4
vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_include_netlists.h → vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_auxiliary_netlists.h
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@ -1,5 +1,5 @@
#ifndef VERILOG_INCLUDE_NETLISTS_H #ifndef VERILOG_AUXILIARY_NETLISTS_H
#define VERILOG_INCLUDE_NETLISTS_H #define VERILOG_AUXILIARY_NETLISTS_H
#include <string> #include <string>
#include "circuit_library.h" #include "circuit_library.h"

2
vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_utils.c
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@ -283,7 +283,7 @@ void dump_verilog_defines_preproc(char* subckt_dir,
if (NULL == fp) { if (NULL == fp) {
vpr_printf(TIO_MESSAGE_ERROR, vpr_printf(TIO_MESSAGE_ERROR,
"(FILE:%s,LINE[%d])Failure in create Verilog netlist %s", "(FILE:%s,LINE[%d]) Failure in create Verilog netlist %s",
__FILE__, __LINE__, fname); __FILE__, __LINE__, fname);
exit(1); exit(1);
} }