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midway in debugging the refactored rr_graph builder

This commit is contained in:
tangxifan 2020-02-03 19:05:18 -07:00
parent 9f3afb5a46
commit 898ed891d2
16 changed files with 214 additions and 175 deletions
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2
vpr/src/base/vpr_context.h
View File

@ -178,7 +178,7 @@ struct DeviceContext : public Context {
// Useful for two stage clock routing
// XXX: currently only one place to source the clock networks so only storing
// a single value
int virtual_clock_network_root_idx;
RRNodeId virtual_clock_network_root_idx;
/** Attributes for each rr_node.
* key: rr_node index

32
vpr/src/device/rr_graph_obj.cpp
View File

@ -69,16 +69,16 @@ short RRGraph::node_xhigh(const RRNodeId& node) const {
* This is due to the convention in creating RRGraph
* so that we can guarantee unique SOURCE/SINK nodes searching
*/
if ( (SOURCE == node_type(node)
|| (SINK == node_type(node)) {
if ( (SOURCE == node_type(node))
|| (SINK == node_type(node)) ) {
return node_bounding_box(node).xmin();
}
return node_bounding_box(node).xmax();
}
short RRGraph::node_yhigh(const RRNodeId& node) const {
if ( (SOURCE == node_type(node)
|| (SINK == node_type(node)) {
if ( (SOURCE == node_type(node))
|| (SINK == node_type(node)) ) {
return node_bounding_box(node).ymin();
}
return node_bounding_box(node).ymax();
@ -391,7 +391,8 @@ RRNodeId RRGraph::find_node(const short& x, const short& y, const t_rr_type& typ
/* Check if x, y, type and ptc, side is valid */
if ((ptc < 0) /* See if ptc is smaller than the index of first element */
|| (size_t(ptc) > node_lookup_[x][y][type].size() - 1)) { /* See if ptc is large than the index of last element */
|| (size_t(ptc) > node_lookup_[x][y][type].size() - 1) /* See if ptc is large than the index of last element */
|| (0 == node_lookup_[x][y][type].size())) { /* See if ptc is large than the index of last element */
/* Return a zero range! */
return RRNodeId::INVALID();
}
@ -856,7 +857,7 @@ RRNodeId RRGraph::create_node(const t_rr_type& type) {
RREdgeId RRGraph::create_edge(const RRNodeId& source, const RRNodeId& sink, const RRSwitchId& switch_id) {
VTR_ASSERT(valid_node_id(source));
VTR_ASSERT(valid_node_id(sink));
VTR_ASSERT(valid_switch_id(switch_id));
//VTR_ASSERT(valid_switch_id(switch_id));
/* Allocate an ID */
RREdgeId edge_id = RREdgeId(num_edges_);
@ -878,6 +879,11 @@ RREdgeId RRGraph::create_edge(const RRNodeId& source, const RRNodeId& sink, cons
return edge_id;
}
void RRGraph::set_edge_switch(const RREdgeId& edge, const RRSwitchId& switch_id) {
VTR_ASSERT(valid_edge_id(edge));
edge_switches_[edge] = switch_id;
}
RRSwitchId RRGraph::create_switch(const t_rr_switch_inf& switch_info) {
//Allocate an ID
RRSwitchId switch_id = RRSwitchId(switch_ids_.size());
@ -1200,8 +1206,8 @@ void RRGraph::build_fast_node_lookup() const {
/* Skip this id */
continue;
}
max_coord.set_x(std::max(max_coord.x(), node_xlow(RRNodeId(id))));
max_coord.set_y(std::max(max_coord.y(), node_ylow(RRNodeId(id))));
max_coord.set_x(std::max(max_coord.x(), std::max(node_bounding_boxes_[RRNodeId(id)].xmax(), node_bounding_boxes_[RRNodeId(id)].xmin())));
max_coord.set_y(std::max(max_coord.y(), std::max(node_bounding_boxes_[RRNodeId(id)].ymax(), node_bounding_boxes_[RRNodeId(id)].ymin())));
}
node_lookup_.resize({(size_t)max_coord.x() + 1, (size_t)max_coord.y() + 1, NUM_RR_TYPES + 1});
@ -1218,15 +1224,17 @@ void RRGraph::build_fast_node_lookup() const {
std::vector<size_t> xlows;
std::vector<size_t> ylows;
if ( (SOURCE == node_type(node)
|| (SINK == node_type(node)) {
if ( (SOURCE == node_type(node))
|| (SINK == node_type(node))
|| (CHANX == node_type(node))
|| (CHANY == node_type(node)) ) {
xlows.resize(node_bounding_boxes_[node].xmax() - node_bounding_boxes_[node].xmin() + 1);
ylows.resize(node_bounding_boxes_[node].ymax() - node_bounding_boxes_[node].ymin() + 1);
std::iota(xlows.begin(), xlows.end(), node_xlow(node));
std::iota(ylows.begin(), ylows.end(), node_ylow(node));
/* Sanity check */
VTR_ASSERT(node_bounding_boxes_[node].xmax() == xlows.back());
VTR_ASSERT(node_bounding_boxes_[node].ymax() == ylows.back());
VTR_ASSERT(size_t(node_bounding_boxes_[node].xmax()) == xlows.back());
VTR_ASSERT(size_t(node_bounding_boxes_[node].ymax()) == ylows.back());
} else {
xlows.push_back(node_xlow(node));
ylows.push_back(node_ylow(node));

1
vpr/src/device/rr_graph_obj.h
View File

@ -615,6 +615,7 @@ class RRGraph {
* configure the nodes and edges in connection
*/
RREdgeId create_edge(const RRNodeId& source, const RRNodeId& sink, const RRSwitchId& switch_id);
void set_edge_switch(const RREdgeId& edge, const RRSwitchId& switch_id);
RRSwitchId create_switch(const t_rr_switch_inf& switch_info);
RRSegmentId create_segment(const t_segment_inf& segment_info);

18
vpr/src/device/rr_graph_obj_util.cpp
View File

@ -63,3 +63,21 @@ std::vector<RRNodeId> find_rr_graph_nodes(const RRGraph& rr_graph,
return indices;
}
std::vector<RRNodeId> find_rr_graph_chan_nodes(const RRGraph& rr_graph,
const int& x,
const int& y,
const t_rr_type& rr_type) {
std::vector<RRNodeId> indices;
VTR_ASSERT(rr_type == CHANX || rr_type == CHANY);
for (short track = 0; track < rr_graph.chan_num_tracks(x, y, rr_type); ++track) {
RRNodeId rr_node_index = rr_graph.find_node(x, y, rr_type, track);
if (rr_node_index != RRNodeId::INVALID()) {
indices.push_back(rr_node_index);
}
}
return indices;
}

6
vpr/src/device/rr_graph_obj_util.h
View File

@ -18,4 +18,10 @@ std::vector<RRNodeId> find_rr_graph_nodes(const RRGraph& rr_graph,
const t_rr_type& rr_type,
const int& ptc);
std::vector<RRNodeId> find_rr_graph_chan_nodes(const RRGraph& rr_graph,
const int& x,
const int& y,
const t_rr_type& rr_type);
#endif

47
vpr/src/route/clock_connection_builders.cpp
View File

@ -2,6 +2,7 @@
#include "globals.h"
#include "rr_graph2.h"
#include "rr_graph_obj_util.h"
#include "vtr_assert.h"
#include "vtr_log.h"
@ -46,17 +47,16 @@ void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_
std::srand(seed);
auto& device_ctx = g_vpr_ctx.mutable_device();
auto& rr_nodes = device_ctx.rr_nodes;
auto& rr_node_indices = device_ctx.rr_node_indices;
auto& rr_graph = device_ctx.rr_graph;
int virtual_clock_network_root_idx = create_virtual_clock_network_sink_node(switch_location.x, switch_location.y);
RRNodeId virtual_clock_network_root_idx = create_virtual_clock_network_sink_node(switch_location.x, switch_location.y);
device_ctx.virtual_clock_network_root_idx = virtual_clock_network_root_idx;
// rr_node indices for x and y channel routing wires and clock wires to connect to
auto x_wire_indices = get_rr_node_chan_wires_at_location(
rr_node_indices, CHANX, switch_location.x, switch_location.y);
auto y_wire_indices = get_rr_node_chan_wires_at_location(
rr_node_indices, CHANY, switch_location.x, switch_location.y);
auto x_wire_indices = find_rr_graph_chan_nodes(
rr_graph, switch_location.x, switch_location.y, CHANX);
auto y_wire_indices = find_rr_graph_chan_nodes(
rr_graph, switch_location.x, switch_location.y, CHANY);
auto clock_indices = clock_graph.get_rr_node_indices_at_switch_location(
clock_to_connect_to, switch_point_name, switch_location.x, switch_location.y);
@ -68,36 +68,35 @@ void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_
// Connect to x-channel wires
unsigned num_wires_x = x_wire_indices.size() * fc;
for (size_t i = 0; i < num_wires_x; i++) {
rr_nodes[x_wire_indices[i]].add_edge(clock_index, rr_switch_idx);
rr_graph.create_edge(x_wire_indices[i], clock_index, RRSwitchId(rr_switch_idx));
}
// Connect to y-channel wires
unsigned num_wires_y = y_wire_indices.size() * fc;
for (size_t i = 0; i < num_wires_y; i++) {
rr_nodes[y_wire_indices[i]].add_edge(clock_index, rr_switch_idx);
rr_graph.create_edge(y_wire_indices[i], clock_index, RRSwitchId(rr_switch_idx));
}
// Connect to virtual clock sink node
// used by the two stage router
rr_nodes[clock_index].add_edge(virtual_clock_network_root_idx, rr_switch_idx);
rr_graph.create_edge(clock_index, virtual_clock_network_root_idx, RRSwitchId(rr_switch_idx));
}
}
int RoutingToClockConnection::create_virtual_clock_network_sink_node(
RRNodeId RoutingToClockConnection::create_virtual_clock_network_sink_node(
int x,
int y) {
auto& device_ctx = g_vpr_ctx.mutable_device();
auto& rr_nodes = device_ctx.rr_nodes;
rr_nodes.emplace_back();
auto node_index = rr_nodes.size() - 1;
auto& rr_graph = device_ctx.rr_graph;
rr_nodes[node_index].set_coordinates(x, y, x, y);
rr_nodes[node_index].set_capacity(1);
rr_nodes[node_index].set_cost_index(SINK_COST_INDEX);
rr_nodes[node_index].set_type(SINK);
RRNodeId node_index = rr_graph.create_node(SINK);
rr_graph.set_node_bounding_box(node_index, vtr::Rect<short>(x, y, x, y));
rr_graph.set_node_capacity(node_index, 1);
rr_graph.set_node_cost_index(node_index, SINK_COST_INDEX);
float R = 0.;
float C = 0.;
rr_nodes[node_index].set_rc_index(find_create_rr_rc_data(R, C));
rr_graph.set_node_rc_data_index(node_index, find_create_rr_rc_data(R, C));
return node_index;
}
@ -179,7 +178,7 @@ void ClockToClockConneciton::create_switches(const ClockRRGraphBuilder& clock_gr
if (from_itter == from_rr_node_indices.end()) {
from_itter = from_rr_node_indices.begin();
}
rr_nodes[*from_itter].add_edge(to_index, rr_switch_idx);
rr_graph.create_edge(*from_itter, to_index, RRSwitchId(rr_switch_idx));
from_itter++;
}
}
@ -213,8 +212,7 @@ void ClockToPinsConnection::set_fc_val(float fc_val) {
void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_graph) {
auto& device_ctx = g_vpr_ctx.mutable_device();
auto& rr_nodes = device_ctx.rr_nodes;
auto& rr_node_indices = device_ctx.rr_node_indices;
auto& rr_graph = device_ctx.rr_graph;
auto& grid = device_ctx.grid;
for (size_t x = 0; x < grid.width(); x++) {
@ -274,8 +272,7 @@ void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_gra
clock_y_offset = -1; // pick the chanx below the block
}
auto clock_pin_node_idx = get_rr_node_index(
rr_node_indices,
auto clock_pin_node_idx = rr_graph.find_node(
x,
y,
IPIN,
@ -290,7 +287,7 @@ void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_gra
//Create edges depending on Fc
for (size_t i = 0; i < clock_network_indices.size() * fc; i++) {
rr_nodes[clock_network_indices[i]].add_edge(clock_pin_node_idx, rr_switch_idx);
rr_graph.create_edge(clock_network_indices[i], clock_pin_node_idx, RRSwitchId(rr_switch_idx));
}
}
}

2
vpr/src/route/clock_connection_builders.h
View File

@ -54,7 +54,7 @@ class RoutingToClockConnection : public ClockConnection {
*/
/* Connects the inter-block routing to the clock source at the specified coordinates */
void create_switches(const ClockRRGraphBuilder& clock_graph);
int create_virtual_clock_network_sink_node(int x, int y);
RRNodeId create_virtual_clock_network_sink_node(int x, int y);
};
class ClockToClockConneciton : public ClockConnection {

57
vpr/src/route/clock_network_builders.cpp
View File

@ -255,8 +255,8 @@ void ClockRib::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphB
clock_graph);
// connect drive point to each half rib using a directed switch
rr_graph.create_edge(drive_node_idx, left_node_idx, drive.switch_idx);
rr_graph.create_edge(drive_node_idx, right_node_idx, drive.switch_idx);
rr_graph.create_edge(drive_node_idx, left_node_idx, RRSwitchId(drive.switch_idx));
rr_graph.create_edge(drive_node_idx, right_node_idx, RRSwitchId(drive.switch_idx));
}
}
}
@ -267,13 +267,12 @@ RRNodeId ClockRib::create_chanx_wire(int x_start,
int ptc_num,
e_direction direction,
RRGraph& rr_graph) {
RRNodeId node_index rr_graph.create_node(CHANX);
RRNodeId node_index = rr_graph.create_node(CHANX);
rr_graph.set_node_bounding_box(node_index, vtr::Rect<size_t>(x_start, y, x_end, y));
rr_graph.set_node_type(node_index, CHANX);
rr_graph.set_node_bounding_box(node_index, vtr::Rect<short>(x_start, y, x_end, y));
rr_graph.set_node_capacity(node_index, 1);
rr_graph.set_node_track_num(node_index, ptc_num);
rr_graph.set_node_rc_index(node_index, find_create_rr_rc_data(
rr_graph.set_node_rc_data_index(node_index, find_create_rr_rc_data(
x_chan_wire.layer.r_metal, x_chan_wire.layer.c_metal));
rr_graph.set_node_direction(node_index, direction);
@ -421,7 +420,7 @@ void ClockSpine::create_segments(std::vector<t_segment_inf>& segment_inf) {
void ClockSpine::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphBuilder& clock_graph,
int num_segments) {
auto& device_ctx = g_vpr_ctx.mutable_device();
auto& rr_nodes = device_ctx.rr_nodes;
auto& rr_graph = device_ctx.rr_graph;
auto& grid = device_ctx.grid;
int ptc_num = clock_graph.get_and_increment_chany_ptc_num(); // used for drawing
@ -472,7 +471,7 @@ void ClockSpine::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGrap
x,
ptc_num,
BI_DIRECTION,
rr_nodes,
rr_graph,
num_segments);
clock_graph.add_switch_location(get_name(), drive.name, x, drive_y, drive_node_idx);
@ -482,14 +481,14 @@ void ClockSpine::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGrap
x,
ptc_num,
DEC_DIRECTION,
rr_nodes,
rr_graph,
num_segments);
auto right_node_idx = create_chany_wire(drive_y + 1,
y_end,
x,
ptc_num,
INC_DIRECTION,
rr_nodes,
rr_graph,
num_segments);
// Keep a record of the rr_node idx that we will use to connects switches to at
@ -502,29 +501,27 @@ void ClockSpine::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGrap
clock_graph);
// connect drive point to each half spine using a directed switch
rr_nodes[drive_node_idx].add_edge(left_node_idx, drive.switch_idx);
rr_nodes[drive_node_idx].add_edge(right_node_idx, drive.switch_idx);
rr_graph.create_edge(drive_node_idx, left_node_idx, RRSwitchId(drive.switch_idx));
rr_graph.create_edge(drive_node_idx, right_node_idx, RRSwitchId(drive.switch_idx));
}
}
}
int ClockSpine::create_chany_wire(int y_start,
int y_end,
int x,
int ptc_num,
e_direction direction,
std::vector<t_rr_node>& rr_nodes,
int num_segments) {
rr_nodes.emplace_back();
auto node_index = rr_nodes.size() - 1;
RRNodeId ClockSpine::create_chany_wire(int y_start,
int y_end,
int x,
int ptc_num,
e_direction direction,
RRGraph& rr_graph,
int num_segments) {
RRNodeId node_index = rr_graph.create_node(CHANY);
rr_nodes[node_index].set_coordinates(x, y_start, x, y_end);
rr_nodes[node_index].set_type(CHANY);
rr_nodes[node_index].set_capacity(1);
rr_nodes[node_index].set_track_num(ptc_num);
rr_nodes[node_index].set_rc_index(find_create_rr_rc_data(
rr_graph.set_node_bounding_box(node_index, vtr::Rect<short>(x, y_start, x, y_end));
rr_graph.set_node_capacity(node_index, 1);
rr_graph.set_node_track_num(node_index, ptc_num);
rr_graph.set_node_rc_data_index(node_index, find_create_rr_rc_data(
y_chan_wire.layer.r_metal, y_chan_wire.layer.c_metal));
rr_nodes[node_index].set_direction(direction);
rr_graph.set_node_direction(node_index, direction);
short seg_index = 0;
switch (direction) {
@ -541,7 +538,7 @@ int ClockSpine::create_chany_wire(int y_start,
VTR_ASSERT_MSG(false, "Unidentified direction type for clock rib");
break;
}
rr_nodes[node_index].set_cost_index(CHANX_COST_INDEX_START + num_segments + seg_index);
rr_graph.set_node_cost_index(node_index, CHANX_COST_INDEX_START + num_segments + seg_index);
return node_index;
}
@ -549,8 +546,8 @@ int ClockSpine::create_chany_wire(int y_start,
void ClockSpine::record_tap_locations(unsigned y_start,
unsigned y_end,
unsigned x,
int left_node_idx,
int right_node_idx,
const RRNodeId& left_node_idx,
const RRNodeId& right_node_idx,
ClockRRGraphBuilder& clock_graph) {
for (unsigned y = y_start + tap.offset; y <= y_end; y += tap.increment) {
if (y < (y_start + drive.offset - 1)) {

34
vpr/src/route/clock_network_builders.h
View File

@ -155,17 +155,17 @@ class ClockRib : public ClockNetwork {
void create_segments(std::vector<t_segment_inf>& segment_inf);
void create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphBuilder& clock_graph,
int num_segments);
int create_chanx_wire(int x_start,
int x_end,
int y,
int ptc_num,
e_direction direction,
std::vector<t_rr_node>& rr_nodes);
RRNodeId create_chanx_wire(int x_start,
int x_end,
int y,
int ptc_num,
e_direction direction,
RRGraph& rr_graph);
void record_tap_locations(unsigned x_start,
unsigned x_end,
unsigned y,
int left_rr_node_idx,
int right_rr_node_idx,
const RRNodeId& left_rr_node_idx,
const RRNodeId& right_rr_node_idx,
ClockRRGraphBuilder& clock_graph);
};
@ -211,18 +211,18 @@ class ClockSpine : public ClockNetwork {
void create_segments(std::vector<t_segment_inf>& segment_inf);
void create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphBuilder& clock_graph,
int num_segments);
int create_chany_wire(int y_start,
int y_end,
int x,
int ptc_num,
e_direction direction,
std::vector<t_rr_node>& rr_nodes,
int num_segments);
RRNodeId create_chany_wire(int y_start,
int y_end,
int x,
int ptc_num,
e_direction direction,
RRGraph& rr_graph,
int num_segments);
void record_tap_locations(unsigned y_start,
unsigned y_end,
unsigned x,
int left_node_idx,
int right_node_idx,
const RRNodeId& left_node_idx,
const RRNodeId& right_node_idx,
ClockRRGraphBuilder& clock_graph);
};

57
vpr/src/route/rr_graph.cpp
View File

@ -38,6 +38,8 @@
#include "create_rr_graph.h"
#include "write_xml_rr_graph_obj.h"
#include "rr_graph_obj_util.h"
#include "check_rr_graph_obj.h"
//#define VERBOSE
@ -133,7 +135,7 @@ static void build_unidir_rr_opins(const int i,
t_rr_edge_info_set& created_rr_edges,
bool* Fc_clipped,
const t_rr_node_indices& L_rr_node_indices,
const std::vector<t_rr_node>& rr_nodes,
const RRGraph& rr_graph,
const t_direct_inf* directs,
const int num_directs,
const t_clb_to_clb_directs* clb_to_clb_directs,
@ -146,7 +148,7 @@ static int get_opin_direct_connections(int x,
const RRNodeId& from_rr_node,
t_rr_edge_info_set& rr_edges_to_create,
const t_rr_node_indices& L_rr_node_indices,
const RRGraph& rr_nodes,
const RRGraph& rr_graph,
const t_direct_inf* directs,
const int num_directs,
const t_clb_to_clb_directs* clb_to_clb_directs);
@ -856,11 +858,11 @@ static void alloc_rr_switch_inf(t_arch_switch_fanin& arch_switch_fanins) {
//
//Note that since we don't store backward edge info in the RR graph we need to walk
//the whole graph to get the per-switch-type fanin info
std::vector<vtr::flat_map<RRNodeId, int>> inward_switch_inf(device_ctx.rr_graph.nodes().size()); //[to_node][arch_switch] -> fanin
vtr::vector<RRNodeId, vtr::flat_map<int, int>> inward_switch_inf(device_ctx.rr_graph.nodes().size()); //[to_node][arch_switch] -> fanin
for (const RRNodeId& inode : device_ctx.rr_graph.nodes()) {
for (const RREdgeId& iedge : device_ctx.rr_graph.node_out_edges(inode)) {
int iswitch = device_ctx.rr_graph.edge_switch(iedge);
const RRNodeId& to_node = device_ctx.rr_graph.edge_sink_node(iedge);
int iswitch = (int)size_t(device_ctx.rr_graph.edge_switch(iedge));
RRNodeId to_node = device_ctx.rr_graph.edge_sink_node(iedge);
if (inward_switch_inf[to_node].count(iswitch) == 0) {
inward_switch_inf[to_node][iswitch] = 0;
@ -971,7 +973,7 @@ static void remap_rr_node_switch_indices(const t_arch_switch_fanin& switch_fanin
for (const RREdgeId& iedge : device_ctx.rr_graph.node_out_edges(from_node)) {
const RRNodeId& to_node = device_ctx.rr_graph.edge_sink_node(iedge);
/* get the switch which this edge uses and its fanin */
int switch_index = device_ctx.rr_graph.edge_switch(iedge);
int switch_index = (int)size_t(device_ctx.rr_graph.edge_switch(iedge));
int fanin = device_ctx.rr_graph.node_in_edges(to_node).size();
if (switch_fanin[switch_index].count(UNDEFINED) == 1) {
@ -983,7 +985,7 @@ static void remap_rr_node_switch_indices(const t_arch_switch_fanin& switch_fanin
int rr_switch_index = itr->second;
device_ctx.rr_graph.set_edge_switch(iedge, rr_switch_index);
device_ctx.rr_graph.set_edge_switch(iedge, RRSwitchId(rr_switch_index));
}
}
}
@ -1291,7 +1293,7 @@ static void alloc_and_load_rr_graph(const int num_nodes,
bool clipped;
build_unidir_rr_opins(i, j, side, grid, Fc_out, max_chan_width,
chan_details_x, chan_details_y, Fc_xofs, Fc_yofs,
rr_edges_to_create, &clipped, L_rr_node_indices, L_rr_node,
rr_edges_to_create, &clipped, L_rr_node_indices, const_cast<const RRGraph&>(rr_graph),
directs, num_directs, clb_to_clb_directs, num_seg_types);
if (clipped) {
*Fc_clipped = true;
@ -1392,7 +1394,7 @@ static void build_bidir_rr_opins(const int i,
}
RRNodeId node_index = rr_graph.find_node(i, j, OPIN, pin_index, side);
VTR_ASSERT(node_index >= 0);
VTR_ASSERT(true == rr_graph.valid_node_id(node_index));
if (total_pin_Fc > 0) {
get_bidir_opin_connections(i, j, pin_index,
@ -1403,7 +1405,7 @@ static void build_bidir_rr_opins(const int i,
/* Add in direct connections */
get_opin_direct_connections(i, j, side, pin_index,
node_index, rr_edges_to_create, L_rr_node_indices, rr_nodes,
node_index, rr_edges_to_create, L_rr_node_indices, rr_graph,
directs, num_directs, clb_to_clb_directs);
}
}
@ -1466,7 +1468,7 @@ static void build_rr_sinks_sources(const int i,
/* SINK and SOURCE-to-OPIN edges */
for (int iclass = 0; iclass < num_class; ++iclass) {
RRNodeId inode = 0;
RRNodeId inode = RRNodeId::INVALID();
if (class_inf[iclass].type == DRIVER) { /* SOURCE */
inode = rr_graph.find_node(i, j, SOURCE, iclass);
@ -1491,7 +1493,7 @@ static void build_rr_sinks_sources(const int i,
rr_graph.set_node_cost_index(inode, SOURCE_COST_INDEX);
} else { /* SINK */
VTR_ASSERT(class_inf[iclass].type == RECEIVER);
inode = rr_graph.find_node(L_rr_node_indices, i, j, SINK, iclass);
inode = rr_graph.find_node(i, j, SINK, iclass);
/* NOTE: To allow route throughs through clbs, change the lines below to *
* make an edge from the input SINK to the output SOURCE. Do for just the *
@ -1508,7 +1510,7 @@ static void build_rr_sinks_sources(const int i,
rr_graph.set_node_bounding_box(inode, vtr::Rect<short>(i, j, i + type->width - 1, j + type->height - 1));
float R = 0.;
float C = 0.;
rr_graph.set_node_rc_index(inode, find_create_rr_rc_data(R, C));
rr_graph.set_node_rc_data_index(inode, find_create_rr_rc_data(R, C));
rr_graph.set_node_ptc_num(inode, iclass);
}
@ -1520,7 +1522,7 @@ static void build_rr_sinks_sources(const int i,
for (e_side side : {TOP, BOTTOM, LEFT, RIGHT}) {
for (int ipin = 0; ipin < num_pins; ++ipin) {
if (type->pinloc[width_offset][height_offset][side][ipin]) {
int inode;
RRNodeId inode;
int iclass = pin_class[ipin];
if (class_inf[iclass].type == RECEIVER) {
@ -1532,8 +1534,8 @@ static void build_rr_sinks_sources(const int i,
//Add info about the edge to be created
rr_edges_to_create.emplace_back(inode, to_node, delayless_switch);
VTR_ASSERT(inode >= 0);
rr_graph.set_node_cost_index(IPIN_COST_INDEX);
VTR_ASSERT(true == rr_graph.valid_node_id(inode));
rr_graph.set_node_cost_index(inode, IPIN_COST_INDEX);
} else {
VTR_ASSERT(class_inf[iclass].type == DRIVER);
@ -1550,7 +1552,7 @@ static void build_rr_sinks_sources(const int i,
rr_graph.set_node_capacity(inode, 1);
float R = 0.;
float C = 0.;
rr_graph.set_node_rc_index(inode, find_create_rr_rc_data(R, C));
rr_graph.set_node_rc_data_index(inode, find_create_rr_rc_data(R, C));
rr_graph.set_node_ptc_num(inode, ipin);
//Note that we store the grid tile location and side where the pin is located,
@ -1558,7 +1560,7 @@ static void build_rr_sinks_sources(const int i,
rr_graph.set_node_bounding_box(inode, vtr::Rect<short>(i + width_offset, j + height_offset, i + width_offset, j + height_offset));
rr_graph.set_node_side(inode, side);
VTR_ASSERT(type->pinloc[width_offset][height_offset][L_rr_node[inode].side()][L_rr_node[inode].pin_num()]);
VTR_ASSERT(type->pinloc[width_offset][height_offset][rr_graph.node_side(inode)][rr_graph.node_pin_num(inode)]);
}
}
}
@ -1741,24 +1743,23 @@ static void build_rr_chan(const int x_coord,
}
/* Edge arrays have now been built up. Do everything else. */
rr_graph.node[node].set_node_cost_index(node, cost_index_offset + seg_details[track].index());
rr_graph.set_node_cost_index(node, cost_index_offset + seg_details[track].index());
rr_graph.set_node_capacity(node, 1); /* GLOBAL routing handled elsewhere */
if (chan_type == CHANX) {
rr_graph.set_node_bounding_box(node, vtr::Rect<short>(start, y_coord, end, y_coord));
} else {
VTR_ASSERT(chan_type == CHANY);
L_rr_node[node].set_coordinates(x_coord, start, x_coord, end);
rr_graph.set_node_bounding_box(node, vtr::Rect<short>(x_coord, start, x_coord, end));
}
int length = end - start + 1;
float R = length * seg_details[track].Rmetal();
float C = length * seg_details[track].Cmetal();
rr_graph.set_node_rc_index(node, find_create_rr_rc_data(R, C));
rr_graph.set_node_rc_data_index(node, find_create_rr_rc_data(R, C));
rr_graph.set_node_ptc_num(node, track);
rr_graph.set_node_type(node, chan_type);
VTR_ASSERT(chan_type == rr_graph.node_type(node));
rr_graph.set_node_direction(node, seg_details[track].direction());
}
}
@ -1804,14 +1805,14 @@ void alloc_and_load_edges(RRGraph& rr_graph,
for (auto itr = edge_range.first; itr != edge_range.second; ++itr) {
VTR_ASSERT(itr->from_node == inode);
rr_graph.create_edge(inode, itr->to_node, itr->switch_type);
rr_graph.create_edge(inode, itr->to_node, RRSwitchId(itr->switch_type));
}
} else {
//Add new edge incrementally
//
//This should occur relatively rarely (e.g. a backward bidir edge) so memory fragmentation shouldn't be a big problem
for (auto itr = edge_range.first; itr != edge_range.second; ++itr) {
rr_graph.create_edge(inode, itr->to_node, itr->switch_type);
rr_graph.create_edge(inode, itr->to_node, RRSwitchId(itr->switch_type));
}
}
}
@ -2836,7 +2837,7 @@ static int get_opin_direct_connections(int x,
const RRNodeId& from_rr_node,
t_rr_edge_info_set& rr_edges_to_create,
const t_rr_node_indices& L_rr_node_indices,
const RRGraph& rr_nodes,
const RRGraph& rr_graph,
const t_direct_inf* directs,
const int num_directs,
const t_clb_to_clb_directs* clb_to_clb_directs) {
@ -2925,7 +2926,7 @@ static int get_opin_direct_connections(int x,
}
} else {
//No side specified, get all candidates
inodes = rr_graph.find_node(x + directs[i].x_offset, y + directs[i].y_offset,
inodes = find_rr_graph_nodes(rr_graph, x + directs[i].x_offset, y + directs[i].y_offset,
IPIN, ipin);
}
@ -3048,7 +3049,7 @@ static std::vector<bool> alloc_and_load_perturb_opins(const t_physical_tile_type
return perturb_opins;
}
static RRNodeId pick_best_direct_connect_target_rr_node(const RRGraph& rr_nodes,
static RRNodeId pick_best_direct_connect_target_rr_node(const RRGraph& rr_graph,
const RRNodeId& from_rr,
const std::vector<RRNodeId>& candidate_rr_nodes) {
//With physically equivalent pins there may be multiple candidate rr nodes (which are equivalent)
@ -3066,7 +3067,7 @@ static RRNodeId pick_best_direct_connect_target_rr_node(const RRGraph& rr_nodes,
float best_dist = std::numeric_limits<float>::infinity();
RRNodeId best_rr = RRNodeId::INVALID();
for (int to_rr : candidate_rr_nodes) {
for (const RRNodeId& to_rr : candidate_rr_nodes) {
VTR_ASSERT(rr_graph.node_type(to_rr) == IPIN);
float to_dist = std::abs(rr_graph.node_xlow(from_rr) - rr_graph.node_xlow(to_rr))
+ std::abs(rr_graph.node_ylow(from_rr) - rr_graph.node_ylow(to_rr));

60
vpr/src/route/rr_graph2.cpp
View File

@ -67,7 +67,7 @@ static int get_unidir_track_to_chan_seg(const int from_track,
const RRGraph& rr_graph,
const t_chan_seg_details* seg_details,
bool* Fs_clipped,
const int from_rr_node,
const RRNodeId& from_rr_node,
t_rr_edge_info_set& rr_edges_to_create);
static int get_track_to_chan_seg(const int from_track,
@ -765,7 +765,7 @@ int get_unidir_opin_connections(const int chan,
int* inc_muxes = nullptr;
int* dec_muxes = nullptr;
int num_inc_muxes, num_dec_muxes, iconn;
int inc_inode_index, dec_inode_index;
RRNodeId inc_inode_index, dec_inode_index;
int inc_mux, dec_mux;
int inc_track, dec_track;
int x, y;
@ -809,8 +809,8 @@ int get_unidir_opin_connections(const int chan,
dec_track = dec_muxes[dec_mux];
/* Figure the inodes of those muxes */
inc_inode_index = rr_graph.find_node(x, y, chan_type, inc_track);
dec_inode_index = rr_graph.find_node(x, y, chan_type, dec_track);
inc_inode_index = rr_graph.find_node(chan, seg, chan_type, inc_track);
dec_inode_index = rr_graph.find_node(chan, seg, chan_type, dec_track);
if (inc_inode_index == RRNodeId::INVALID() || dec_inode_index == RRNodeId::INVALID()) {
continue;
@ -1069,24 +1069,24 @@ static void load_chan_rr_indices(const int max_chan_width,
int y = (type == CHANX ? chan : seg);
const t_chan_seg_details* seg_details = chan_details[x][y].data();
for (unsigned track = 0; track < num_chans - 1; ++track) {
for (int track = 0; track < num_chans - 1; ++track) {
if (seg_details[track].length() <= 0)
continue;
int start = get_seg_start(seg_details, track, chan, seg);
/* If this segment does not start from the current position, we do not allocate any nodes */
if (start != seg) {
continue;
/* We give a fake coordinator here, to ease the downstream builder */
short xlow = chan;
short ylow = start;
RRNodeId node = rr_graph.find_node(xlow, ylow, type, track);
if (false == rr_graph.valid_node_id(node)) {
RRNodeId new_node = rr_graph.create_node(type);
rr_graph.set_node_bounding_box(new_node, vtr::Rect<short>(xlow, ylow, xlow, ylow));
rr_graph.set_node_track_num(new_node, track);
(*index)++;
}
RRNodeId node = rr_graph.create_node(type);
short xlow = x;
short ylow = y;
short xhigh = (type == CHANX ? xlow + seg_details[track].length() - 1 : xlow);
short yhigh = (type == CHANY ? ylow + seg_details[track].length() - 1 : ylow);
rr_graph.set_node_bounding_box(node, vtr::Rect<short>(xlow, ylow, xhigh, yhigh));
rr_graph.set_node_track_num(node, track);
}
}
}
@ -1108,13 +1108,13 @@ static void load_block_rr_indices(const DeviceGrid& grid,
auto class_type = type->class_inf[iclass].type;
if (class_type == DRIVER) {
RRNodeId node = rr_graph.create_node(SOURCE);
rr_graph.set_node_bounding_box(node, vtr::Rect<size_t>(x, y, x, y));
rr_graph.set_node_class_num(iclass);
rr_graph.set_node_bounding_box(node, vtr::Rect<short>(x, y, x, y));
rr_graph.set_node_class_num(node, iclass);
} else {
VTR_ASSERT(class_type == RECEIVER);
RRNodeId node = rr_graph.create_node(SINK);
rr_graph.set_node_bounding_box(node, vtr::Rect<size_t>(x, y, x, y));
rr_graph.set_node_class_num(iclass);
rr_graph.set_node_bounding_box(node, vtr::Rect<short>(x, y, x, y));
rr_graph.set_node_class_num(node, iclass);
}
++(*index);
}
@ -1132,15 +1132,15 @@ static void load_block_rr_indices(const DeviceGrid& grid,
if (class_type == DRIVER) {
RRNodeId node = rr_graph.create_node(OPIN);
rr_graph.set_node_bounding_box(node, vtr::Rect<size_t>(xtile, ytile, xtile, ytile));
rr_graph.set_node_pin_num(ipin);
rr_graph.set_node_side(side);
rr_graph.set_node_bounding_box(node, vtr::Rect<short>(x_tile, y_tile, x_tile, y_tile));
rr_graph.set_node_pin_num(node, ipin);
rr_graph.set_node_side(node, side);
} else {
VTR_ASSERT(class_type == RECEIVER);
RRNodeId node = rr_graph.create_node(IPIN);
rr_graph.set_node_bounding_box(node, vtr::Rect<size_t>(xtile, ytile, xtile, ytile));
rr_graph.set_node_pin_num(ipin);
rr_graph.set_node_side(side);
rr_graph.set_node_bounding_box(node, vtr::Rect<short>(x_tile, y_tile, x_tile, y_tile));
rr_graph.set_node_pin_num(node, ipin);
rr_graph.set_node_side(node, side);
}
++(*index);
}
@ -1162,7 +1162,7 @@ static void load_block_rr_indices(const DeviceGrid& grid,
* this can avoid runtime cost to rebuild the fast look-up inside RRGraph object
*/
if ( (grid[x][y].type->height == height_offset && grid[x][y].type->width == width_offset)
&& (0 != height_offset && 0 != width_offset) ) {
&& (0 != height_offset || 0 != width_offset) ) {
int root_x = x - width_offset;
int root_y = y - height_offset;
@ -1176,12 +1176,12 @@ static void load_block_rr_indices(const DeviceGrid& grid,
if (class_type == DRIVER) {
RRNodeId node = rr_graph.find_node(root_x, root_y, SOURCE, iclass);
/* Update the internal look-up so that we can find the SOURCE/SINK node using their offset coordinates */
rr_graph.set_node_bounding_box(node, vtr::Rect<size_t>(root_x, root_y, x, y));
rr_graph.set_node_bounding_box(node, vtr::Rect<short>(root_x, root_y, x, y));
} else {
VTR_ASSERT(class_type == RECEIVER);
RRNodeId node = rr_graph.find_node(root_x, root_y, SINK, iclass);
/* Update the internal look-up so that we can find the SOURCE/SINK node using their offset coordinates */
rr_graph.set_node_bounding_box(node, vtr::Rect<size_t>(root_x, root_y, x, y));
rr_graph.set_node_bounding_box(node, vtr::Rect<short>(root_x, root_y, x, y));
}
}
}
@ -1454,7 +1454,7 @@ int get_track_to_pins(int seg,
/* Check there is a connection and Fc map isn't wrong */
/*int to_node = get_rr_node_index(L_rr_node_indices, x + width_offset, y + height_offset, IPIN, ipin, side);*/
RRNodeId to_node = rr_graph.find_node(x, y, IPIN, ipin, side);
if (to_node >= 0) {
if (rr_graph.valid_node_id(to_node)) {
rr_edges_to_create.emplace_back(from_rr_node, to_node, wire_to_ipin_switch);
++num_conn;
}

18
vpr/src/route/rr_graph2.h
View File

@ -15,7 +15,7 @@ enum e_seg_details_type {
};
struct t_rr_edge_info {
t_rr_edge_info(const RRNodeId& from, const RRNodeId& to, const short& type) noexcept
t_rr_edge_info(RRNodeId from, RRNodeId to, short type) noexcept
: from_node(from)
, to_node(to)
, switch_type(type) {}
@ -25,11 +25,19 @@ struct t_rr_edge_info {
short switch_type = OPEN;
friend bool operator<(const t_rr_edge_info& lhs, const t_rr_edge_info& rhs) {
return std::tie(size_t(lhs.from_node), size_t(lhs.to_node), lhs.switch_type) < std::tie(size_t(rhs.from_node), size_t(rhs.to_node), rhs.switch_type);
size_t lhs_from_node = size_t(lhs.from_node);
size_t lhs_to_node = size_t(lhs.to_node);
size_t rhs_from_node = size_t(rhs.from_node);
size_t rhs_to_node = size_t(rhs.to_node);
return std::tie(lhs_from_node, lhs_to_node, lhs.switch_type) < std::tie(rhs_from_node, rhs_to_node, rhs.switch_type);
}
friend bool operator==(const t_rr_edge_info& lhs, const t_rr_edge_info& rhs) {
return std::tie(size_t(lhs.from_node), size_t(lhs.to_node), lhs.switch_type) == std::tie(size_t(rhs.from_node), size_t(rhs.to_node), rhs.switch_type);
size_t lhs_from_node = size_t(lhs.from_node);
size_t lhs_to_node = size_t(lhs.to_node);
size_t rhs_from_node = size_t(rhs.from_node);
size_t rhs_to_node = size_t(rhs.to_node);
return std::tie(lhs_from_node, lhs_to_node, lhs.switch_type) == std::tie(rhs_from_node, rhs_to_node, rhs.switch_type);
}
};
@ -145,10 +153,10 @@ bool is_sblock(const int chan,
int get_bidir_opin_connections(const int i,
const int j,
const int ipin,
const int from_rr_node,
const RRNodeId& from_rr_node,
t_rr_edge_info_set& rr_edges_to_create,
const t_pin_to_track_lookup& opin_to_track_map,
const t_rr_node_indices& L_rr_node_indices,
const RRGraph& rr_graph,
const t_chan_details& chan_details_x,
const t_chan_details& chan_details_y);

14
vpr/src/route/rr_graph_clock.cpp
View File

@ -71,7 +71,7 @@ void ClockRRGraphBuilder::add_rr_switches_and_map_to_nodes(size_t node_start_idx
auto& rr_graph = device_ctx.rr_graph;
// Check to see that clock nodes were sucessfully appended to rr_nodes
VTR_ASSERT(true == rr_graph.valid_node_id(RRNodeId(node_start_idx));
VTR_ASSERT(true == rr_graph.valid_node_id(RRNodeId(node_start_idx)));
std::unordered_map<int, int> arch_switch_to_rr_switch;
@ -79,7 +79,7 @@ void ClockRRGraphBuilder::add_rr_switches_and_map_to_nodes(size_t node_start_idx
for (size_t node_idx = node_start_idx; node_idx < rr_graph.nodes().size(); node_idx++) {
const RRNodeId& from_node = RRNodeId(node_idx);
for (const RREdgeId& edge_idx : rr_graph.node_out_edges(from_node)) {
int arch_switch_idx = rr_graph.edge_switch(edge_idx);
int arch_switch_idx = (int)size_t(rr_graph.edge_switch(edge_idx));
int rr_switch_idx;
auto itter = arch_switch_to_rr_switch.find(arch_switch_idx);
@ -92,7 +92,7 @@ void ClockRRGraphBuilder::add_rr_switches_and_map_to_nodes(size_t node_start_idx
rr_switch_idx = itter->second;
}
rr_graph.set_edge_switch(edge_idx, rr_switch_idx);
rr_graph.set_edge_switch(edge_idx, RRSwitchId(rr_switch_idx));
}
}
@ -148,7 +148,7 @@ void SwitchPoint::insert_node_idx(int x, int y, const RRNodeId& node_idx) {
locations.insert({x, y});
}
std::vector<int> ClockRRGraphBuilder::get_rr_node_indices_at_switch_location(std::string clock_name,
std::vector<RRNodeId> ClockRRGraphBuilder::get_rr_node_indices_at_switch_location(std::string clock_name,
std::string switch_point_name,
int x,
int y) const {
@ -161,7 +161,7 @@ std::vector<int> ClockRRGraphBuilder::get_rr_node_indices_at_switch_location(std
return switch_points.get_rr_node_indices_at_location(switch_point_name, x, y);
}
std::vector<int> SwitchPoints::get_rr_node_indices_at_location(std::string switch_point_name,
std::vector<RRNodeId> SwitchPoints::get_rr_node_indices_at_location(std::string switch_point_name,
int x,
int y) const {
auto itter = switch_point_name_to_switch_location.find(switch_point_name);
@ -170,11 +170,11 @@ std::vector<int> SwitchPoints::get_rr_node_indices_at_location(std::string switc
VTR_ASSERT(itter != switch_point_name_to_switch_location.end());
auto& switch_point = itter->second;
std::vector<int> rr_node_indices = switch_point.get_rr_node_indices_at_location(x, y);
std::vector<RRNodeId> rr_node_indices = switch_point.get_rr_node_indices_at_location(x, y);
return rr_node_indices;
}
std::vector<int> SwitchPoint::get_rr_node_indices_at_location(int x, int y) const {
std::vector<RRNodeId> SwitchPoint::get_rr_node_indices_at_location(int x, int y) const {
// assert that switch is connected to nodes at the location
VTR_ASSERT(!rr_node_indices[x][y].empty());

14
vpr/src/route/rr_graph_clock.h
View File

@ -13,7 +13,7 @@
#include "clock_network_builders.h"
#include "clock_connection_builders.h"
#include "rr_graph_obj_fwd.h"
#include "rr_graph_fwd.h"
class ClockNetwork;
class ClockConnection;
@ -31,12 +31,12 @@ class SwitchPoint {
std::set<std::pair<int, int>> locations; // x,y
public:
/** Getters **/
std::vector<int> get_rr_node_indices_at_location(int x, int y) const;
std::vector<RRNodeId> get_rr_node_indices_at_location(int x, int y) const;
std::set<std::pair<int, int>> get_switch_locations() const;
/** Setters **/
void insert_node_idx(int x, int y, int node_idx);
void insert_node_idx(int x, int y, const RRNodeId& node_idx);
};
class SwitchPoints {
@ -52,14 +52,14 @@ class SwitchPoints {
/* Example: x,y = middle of the chip, switch_point_name == name of main drive
* of global clock spine, returns the rr_nodes of all the clock spines that
* start the newtork there*/
std::vector<int> get_rr_node_indices_at_location(std::string switch_point_name,
std::vector<RRNodeId> get_rr_node_indices_at_location(std::string switch_point_name,
int x,
int y) const;
std::set<std::pair<int, int>> get_switch_locations(std::string switch_point_name) const;
/** Setters **/
void insert_switch_node_idx(std::string switch_point_name, int x, int y, int node_idx);
void insert_switch_node_idx(std::string switch_point_name, int x, int y, const RRNodeId& node_idx);
};
class ClockRRGraphBuilder {
@ -80,10 +80,10 @@ class ClockRRGraphBuilder {
std::string switch_point_name,
int x,
int y,
int node_index);
const RRNodeId& node_index);
/* Returns the rr_node idx of the switch at location {x, y} */
std::vector<int> get_rr_node_indices_at_switch_location(std::string clock_name,
std::vector<RRNodeId> get_rr_node_indices_at_switch_location(std::string clock_name,
std::string switch_point_name,
int x,
int y) const;

2
vpr/src/route/rr_graph_indexed_data.cpp
View File

@ -347,7 +347,7 @@ static void load_rr_indexed_data_T_values(int index_start,
RRNodeId to_node_index = device_ctx.rr_graph.edge_sink_node(iedge);
/* want to get C/R/Tdel/Cinternal of switches that connect this track segment to other track segments */
if (device_ctx.rr_graph.node_type(to_node_index) == CHANX || device_ctx.rr_graph.node_type(to_node_index) == CHANY) {
int switch_index = device_ctx.rr_graph.edge_switch(iedge);
int switch_index = (int)size_t(device_ctx.rr_graph.edge_switch(iedge));
avg_switch_R += device_ctx.rr_switch_inf[switch_index].R;
avg_switch_T += device_ctx.rr_switch_inf[switch_index].Tdel;
avg_switch_Cinternal += device_ctx.rr_switch_inf[switch_index].Cinternal;

25
vpr/src/route/rr_graph_reader.cpp
View File

@ -44,6 +44,9 @@
#include "vpr_utils.h"
#include "vpr_error.h"
#include "rr_graph_obj.h"
#include "check_rr_graph_obj.h"
#include "rr_graph_reader.h"
/*********************** Subroutines local to this module *******************/
@ -281,7 +284,7 @@ void process_seg_id(pugi::xml_node parent, const pugiutil::loc_data& loc_data) {
while (rr_node) {
id = get_attribute(rr_node, "id", loc_data).as_int();
auto& node = RRNodeId(id);
RRNodeId node = RRNodeId(id);
segmentSubnode = get_single_child(rr_node, "segment", loc_data, pugiutil::OPTIONAL);
if (segmentSubnode) {
@ -310,18 +313,18 @@ void process_nodes(pugi::xml_node parent, const pugiutil::loc_data& loc_data) {
int inode = get_attribute(rr_node, "id", loc_data).as_int();
t_rr_type node_type = NUM_RR_TYPES;
const char* node_type = get_attribute(rr_node, "type", loc_data).as_string();
if (strcmp(node_type, "CHANX") == 0) {
const char* node_type_str = get_attribute(rr_node, "type", loc_data).as_string();
if (strcmp(node_type_str, "CHANX") == 0) {
node_type = CHANX;
} else if (strcmp(node_type, "CHANY") == 0) {
} else if (strcmp(node_type_str, "CHANY") == 0) {
node_type = CHANY;
} else if (strcmp(node_type, "SOURCE") == 0) {
} else if (strcmp(node_type_str, "SOURCE") == 0) {
node_type = SOURCE;
} else if (strcmp(node_type, "SINK") == 0) {
} else if (strcmp(node_type_str, "SINK") == 0) {
node_type = SINK;
} else if (strcmp(node_type, "OPIN") == 0) {
} else if (strcmp(node_type_str, "OPIN") == 0) {
node_type = OPIN;
} else if (strcmp(node_type, "IPIN") == 0) {
} else if (strcmp(node_type_str, "IPIN") == 0) {
node_type = IPIN;
} else {
VPR_FATAL_ERROR(VPR_ERROR_OTHER,
@ -371,7 +374,7 @@ void process_nodes(pugi::xml_node parent, const pugiutil::loc_data& loc_data) {
device_ctx.rr_graph.set_node_side(node, side);
}
device_ctx.rr_graph.set_node_bouding_box(node, vtr::Rect<short>(x1, y1, x2, y2));
device_ctx.rr_graph.set_node_bounding_box(node, vtr::Rect<short>(x1, y1, x2, y2));
device_ctx.rr_graph.set_node_ptc_num(node, get_attribute(locSubnode, "ptc", loc_data).as_int());
//-------
@ -495,7 +498,7 @@ void process_edges(pugi::xml_node parent, const pugiutil::loc_data& loc_data, in
while (edges_meta) {
auto key = get_attribute(edges_meta, "name", loc_data).as_string();
vpr::add_rr_edge_metadata(source_node, sink_node, switch_id,
vpr::add_rr_edge_metadata(size_t(source_node), size_t(sink_node), switch_id,
key, edges_meta.child_value());
edges_meta = edges_meta.next_sibling(edges_meta.name());
@ -899,7 +902,7 @@ void set_cost_indices(pugi::xml_node parent, const pugiutil::loc_data& loc_data,
if (attribute) {
int seg_id = get_attribute(segmentSubnode, "segment_id", loc_data).as_int(0);
if (is_global_graph) {
device_ctx.rr_graph.set_node_cost_index(0);
device_ctx.rr_graph.set_node_cost_index(inode, 0);
} else if (device_ctx.rr_graph.node_type(inode) == CHANX) {
device_ctx.rr_graph.set_node_cost_index(inode, CHANX_COST_INDEX_START + seg_id);
} else if (device_ctx.rr_graph.node_type(inode) == CHANY) {