disable nolatch option for k6n10f family for now

This commit is contained in:
Tarachand Pagarani 2021-12-17 05:11:35 -08:00
parent 3691eb54b9
commit 71b0b171b4
1 changed files with 14 additions and 1 deletions

View File

@ -99,6 +99,8 @@ parser.add_argument('--arch_variable_file', type=str, default=None,
# help="Key file for shell") # help="Key file for shell")
parser.add_argument('--yosys_tmpl', type=str, default=None, parser.add_argument('--yosys_tmpl', type=str, default=None,
help="Alternate yosys template, generates top_module.blif") help="Alternate yosys template, generates top_module.blif")
parser.add_argument('--yosys_args', type=str, default=None,
help="Arguments for yosys")
parser.add_argument('--ys_rewrite_tmpl', type=str, default=None, parser.add_argument('--ys_rewrite_tmpl', type=str, default=None,
help="Alternate yosys template, to rewrite verilog netlist") help="Alternate yosys template, to rewrite verilog netlist")
parser.add_argument('--verific', action="store_true", parser.add_argument('--verific', action="store_true",
@ -487,11 +489,22 @@ def create_yosys_params():
tmpVar = OpenFPGAArgs[indx][2:].upper() tmpVar = OpenFPGAArgs[indx][2:].upper()
ys_params[tmpVar] = OpenFPGAArgs[indx+1] ys_params[tmpVar] = OpenFPGAArgs[indx+1]
yosys_args = []
if args.yosys_args:
yosys_args = ys_params["YOSYS_ARGS"].split()
yosysargparser = argparse.ArgumentParser(description="Parses yosys arguments")
yosysargparser.add_argument("-family", type=str, help="Family")
yosys_args = yosysargparser.parse_args(yosys_args)
if not args.verific: if not args.verific:
if args.yosys_args and yosys_args.family == "qlf_k6n10f":
ys_params["READ_VERILOG_FILE"] = " \n".join([ ys_params["READ_VERILOG_FILE"] = " \n".join([
#"read_verilog -nolatches " + shlex.quote(eachfile)
"read_verilog " + shlex.quote(eachfile) "read_verilog " + shlex.quote(eachfile)
for eachfile in args.benchmark_files]) for eachfile in args.benchmark_files])
else:
ys_params["READ_VERILOG_FILE"] = " \n".join([
"read_verilog -nolatches " + shlex.quote(eachfile)
for eachfile in args.benchmark_files])
else: else:
if "ADD_INCLUDE_DIR" not in ys_params: if "ADD_INCLUDE_DIR" not in ys_params:
ys_params["ADD_INCLUDE_DIR"] = "" ys_params["ADD_INCLUDE_DIR"] = ""