[doc] update pin table file format for pin direction keywords
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@ -14,22 +14,22 @@ An example of the file is shown as follows.
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.. code-block:: xml
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.. code-block:: xml
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orientation,row,col,pin_num_in_cell,port_name,mapped_pin,GPIO_type,Associated Clock,Clock Edge
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orientation,row,col,pin_num_in_cell,port_name,mapped_pin,GPIO_type,Associated Clock,Clock Edge
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TOP,,,,gfpga_pad_IO_A2F[0],pad_fpga_io[0],,,
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TOP,,,,gfpga_pad_IO_A2F[0],pad_fpga_io[0],in,,
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TOP,,,,gfpga_pad_IO_F2A[0],pad_fpga_io[0],,,
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TOP,,,,gfpga_pad_IO_F2A[0],pad_fpga_io[0],out,,
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TOP,,,,gfpga_pad_IO_A2F[4],pad_fpga_io[1],,,
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TOP,,,,gfpga_pad_IO_A2F[4],pad_fpga_io[1],in,,
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TOP,,,,gfpga_pad_IO_F2A[4],pad_fpga_io[1],,,
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TOP,,,,gfpga_pad_IO_F2A[4],pad_fpga_io[1],out,,
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TOP,,,,gfpga_pad_IO_A2F[8],pad_fpga_io[2],,,
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TOP,,,,gfpga_pad_IO_A2F[8],pad_fpga_io[2],in,,
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TOP,,,,gfpga_pad_IO_F2A[8],pad_fpga_io[2],,,
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TOP,,,,gfpga_pad_IO_F2A[8],pad_fpga_io[2],out,,
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TOP,,,,gfpga_pad_IO_A2F[31],pad_fpga_io[3],,,
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TOP,,,,gfpga_pad_IO_A2F[31],pad_fpga_io[3],in,,
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TOP,,,,gfpga_pad_IO_F2A[31],pad_fpga_io[3],,,
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TOP,,,,gfpga_pad_IO_F2A[31],pad_fpga_io[3],out,,
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RIGHT,,,,gfpga_pad_IO_A2F[32],pad_fpga_io[4],,,
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RIGHT,,,,gfpga_pad_IO_A2F[32],pad_fpga_io[4],in,,
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RIGHT,,,,gfpga_pad_IO_F2A[32],pad_fpga_io[4],,,
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RIGHT,,,,gfpga_pad_IO_F2A[32],pad_fpga_io[4],out,,
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RIGHT,,,,gfpga_pad_IO_A2F[40],pad_fpga_io[5],,,
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RIGHT,,,,gfpga_pad_IO_A2F[40],pad_fpga_io[5],in,,
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RIGHT,,,,gfpga_pad_IO_F2A[40],pad_fpga_io[5],,,
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RIGHT,,,,gfpga_pad_IO_F2A[40],pad_fpga_io[5],out,,
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BOTTOM,,,,gfpga_pad_IO_A2F[64],pad_fpga_io[6],,,
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BOTTOM,,,,gfpga_pad_IO_A2F[64],pad_fpga_io[6],in,,
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BOTTOM,,,,gfpga_pad_IO_F2A[64],pad_fpga_io[6],,,
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BOTTOM,,,,gfpga_pad_IO_F2A[64],pad_fpga_io[6],out,,
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LEFT,,,,gfpga_pad_IO_F2A[127],pad_fpga_io[7],,,
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LEFT,,,,gfpga_pad_IO_F2A[127],pad_fpga_io[7],in,,
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LEFT,,,,gfpga_pad_IO_A2F[127],pad_fpga_io[7],,,
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LEFT,,,,gfpga_pad_IO_A2F[127],pad_fpga_io[7],out,,
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An pin table may serve in various purposes. However, for OpenFPGA, the following attributes are required
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An pin table may serve in various purposes. However, for OpenFPGA, the following attributes are required
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@ -45,4 +45,8 @@ An pin table may serve in various purposes. However, for OpenFPGA, the following
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Specify the pin name of the FPGA chip
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Specify the pin name of the FPGA chip
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.. warning:: Currently, the direction of the port is inferred by the ``port_name``. A postfix of ``A2F`` indicates an input port, while a postfix of ``F2A`` indicates an output port.
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.. option:: GPIO_type
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Specify the pin direction. Can be [``in``|``out``].
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.. note:: This column can be left as empty if users follow quicklogic style. See details in :ref:`openfpga_setup_commands_pcf2place`
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@ -267,6 +267,8 @@ write_fabric_io_info
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.. note:: This file is designed for pin constraint file conversion.
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.. note:: This file is designed for pin constraint file conversion.
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.. _openfpga_setup_commands_pcf2place:
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pcf2place
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pcf2place
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~~~~~~~~~
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~~~~~~~~~
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