From 70b0d2e505a56b91da6c1779fcf0bcce14622d7c Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Mon, 17 Oct 2022 15:32:00 -0700
Subject: [PATCH] [doc] update pin table file format for pin direction keywords

---
 .../manual/file_formats/pin_table_file.rst    | 38 ++++++++++---------
 .../openfpga_commands/setup_commands.rst      |  2 +
 2 files changed, 23 insertions(+), 17 deletions(-)

diff --git a/docs/source/manual/file_formats/pin_table_file.rst b/docs/source/manual/file_formats/pin_table_file.rst
index 033f7c9b7..46b316e7b 100644
--- a/docs/source/manual/file_formats/pin_table_file.rst
+++ b/docs/source/manual/file_formats/pin_table_file.rst
@@ -14,22 +14,22 @@ An example of the file is shown as follows.
 .. code-block:: xml
 
   orientation,row,col,pin_num_in_cell,port_name,mapped_pin,GPIO_type,Associated Clock,Clock Edge
-  TOP,,,,gfpga_pad_IO_A2F[0],pad_fpga_io[0],,,
-  TOP,,,,gfpga_pad_IO_F2A[0],pad_fpga_io[0],,,
-  TOP,,,,gfpga_pad_IO_A2F[4],pad_fpga_io[1],,,
-  TOP,,,,gfpga_pad_IO_F2A[4],pad_fpga_io[1],,,
-  TOP,,,,gfpga_pad_IO_A2F[8],pad_fpga_io[2],,,
-  TOP,,,,gfpga_pad_IO_F2A[8],pad_fpga_io[2],,,
-  TOP,,,,gfpga_pad_IO_A2F[31],pad_fpga_io[3],,,
-  TOP,,,,gfpga_pad_IO_F2A[31],pad_fpga_io[3],,,
-  RIGHT,,,,gfpga_pad_IO_A2F[32],pad_fpga_io[4],,,
-  RIGHT,,,,gfpga_pad_IO_F2A[32],pad_fpga_io[4],,,
-  RIGHT,,,,gfpga_pad_IO_A2F[40],pad_fpga_io[5],,,
-  RIGHT,,,,gfpga_pad_IO_F2A[40],pad_fpga_io[5],,,
-  BOTTOM,,,,gfpga_pad_IO_A2F[64],pad_fpga_io[6],,,
-  BOTTOM,,,,gfpga_pad_IO_F2A[64],pad_fpga_io[6],,,
-  LEFT,,,,gfpga_pad_IO_F2A[127],pad_fpga_io[7],,,
-  LEFT,,,,gfpga_pad_IO_A2F[127],pad_fpga_io[7],,,
+  TOP,,,,gfpga_pad_IO_A2F[0],pad_fpga_io[0],in,,
+  TOP,,,,gfpga_pad_IO_F2A[0],pad_fpga_io[0],out,,
+  TOP,,,,gfpga_pad_IO_A2F[4],pad_fpga_io[1],in,,
+  TOP,,,,gfpga_pad_IO_F2A[4],pad_fpga_io[1],out,,
+  TOP,,,,gfpga_pad_IO_A2F[8],pad_fpga_io[2],in,,
+  TOP,,,,gfpga_pad_IO_F2A[8],pad_fpga_io[2],out,,
+  TOP,,,,gfpga_pad_IO_A2F[31],pad_fpga_io[3],in,,
+  TOP,,,,gfpga_pad_IO_F2A[31],pad_fpga_io[3],out,,
+  RIGHT,,,,gfpga_pad_IO_A2F[32],pad_fpga_io[4],in,,
+  RIGHT,,,,gfpga_pad_IO_F2A[32],pad_fpga_io[4],out,,
+  RIGHT,,,,gfpga_pad_IO_A2F[40],pad_fpga_io[5],in,,
+  RIGHT,,,,gfpga_pad_IO_F2A[40],pad_fpga_io[5],out,,
+  BOTTOM,,,,gfpga_pad_IO_A2F[64],pad_fpga_io[6],in,,
+  BOTTOM,,,,gfpga_pad_IO_F2A[64],pad_fpga_io[6],out,,
+  LEFT,,,,gfpga_pad_IO_F2A[127],pad_fpga_io[7],in,,
+  LEFT,,,,gfpga_pad_IO_A2F[127],pad_fpga_io[7],out,,
 
 An pin table may serve in various purposes. However, for OpenFPGA, the following attributes are required
 
@@ -45,4 +45,8 @@ An pin table may serve in various purposes. However, for OpenFPGA, the following
 
   Specify the pin name of the FPGA chip
 
-.. warning:: Currently, the direction of the port is inferred by the ``port_name``. A postfix of ``A2F`` indicates an input port, while a postfix of ``F2A`` indicates an output port. 
+.. option:: GPIO_type
+
+  Specify the pin direction. Can be [``in``|``out``].
+
+  .. note:: This column can be left as empty if users follow quicklogic style. See details in :ref:`openfpga_setup_commands_pcf2place`
diff --git a/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst b/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst
index 7e84351da..9c05ee00c 100644
--- a/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst
+++ b/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst
@@ -267,6 +267,8 @@ write_fabric_io_info
 
   .. note:: This file is designed for pin constraint file conversion.
 
+.. _openfpga_setup_commands_pcf2place:
+
 pcf2place
 ~~~~~~~~~