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[Test] Add an example of repack pin constraints file

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tangxifan 2021-01-16 14:38:39 -07:00
parent b8e4675a3a
commit 6ab0f71896
1 changed files with 5 additions and 0 deletions
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openfpga_flow/tasks/basic_tests/global_tile_ports/global_tile_4clock/config/repack_pin_constraints.xml Normal file
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<repack_pin_constraints>
<pin_constraint tile="clb" name="clk[0]" net="clk0"/>
<pin_constraint tile="clb" name="clk[1]" net="clk1"/>
</repack_pin_constraints>