riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

[test] disable pnr writer in test cases

This commit is contained in:
tangxifan 2023-07-25 15:39:25 -07:00
parent de6956530f
commit 523cf83cc9
1 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
openfpga_flow/openfpga_shell_scripts/group_tile_full_testbench_example_script.openfpga
View File

@ -56,7 +56,8 @@ write_full_testbench --file ./SRC --reference_benchmark_file_path ${REFERENCE_VE
# Write the SDC files for PnR backend # Write the SDC files for PnR backend
# - Turn on every options here # - Turn on every options here
write_pnr_sdc --file ./SDC # FIXME: Not supported yet.
#write_pnr_sdc --file ./SDC
# Write SDC to disable timing for configure ports # Write SDC to disable timing for configure ports
write_sdc_disable_timing_configure_ports --file ./SDC/disable_configure_ports.sdc write_sdc_disable_timing_configure_ports --file ./SDC/disable_configure_ports.sdc