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[core] disable pnr sdc for tile-based fabric

This commit is contained in:
tangxifan 2023-07-25 15:38:41 -07:00
parent 6ecbbb3a94
commit de6956530f
3 changed files with 29 additions and 22 deletions
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9
openfpga/src/base/openfpga_sdc_template.h
View File

@ -96,11 +96,12 @@ int write_pnr_sdc_template(const T& openfpga_ctx, const Command& cmd,
/* Execute only when sdc is enabled */
if (true == options.generate_sdc_pnr()) {
print_pnr_sdc(
return print_pnr_sdc(
options, g_vpr_ctx.device(), openfpga_ctx.vpr_device_annotation(),
openfpga_ctx.device_rr_gsb(), openfpga_ctx.module_graph(),
openfpga_ctx.mux_lib(), openfpga_ctx.arch().circuit_lib,
openfpga_ctx.fabric_global_port_info(), openfpga_ctx.simulation_setting(),
openfpga_ctx.fabric_tile(), openfpga_ctx.device_rr_gsb(),
openfpga_ctx.module_graph(), openfpga_ctx.mux_lib(),
openfpga_ctx.arch().circuit_lib, openfpga_ctx.fabric_global_port_info(),
openfpga_ctx.simulation_setting(),
openfpga_ctx.flow_manager().compress_routing());
}

25
openfpga/src/fpga_sdc/pnr_sdc_writer.cpp
View File

@ -13,6 +13,7 @@
#include <iomanip>
/* Headers from vtrutil library */
#include "command_exit_codes.h"
#include "vtr_assert.h"
#include "vtr_log.h"
#include "vtr_time.h"
@ -338,15 +339,19 @@ static void print_pnr_sdc_compact_routing_disable_switch_block_outputs(
* 3. Design constraints for Connection Blocks
* 4. Design constraints for breaking the combinational loops in FPGA fabric
*******************************************************************/
void print_pnr_sdc(const PnrSdcOption& sdc_options,
const DeviceContext& device_ctx,
const VprDeviceAnnotation& device_annotation,
const DeviceRRGSB& device_rr_gsb,
const ModuleManager& module_manager,
const MuxLibrary& mux_lib, const CircuitLibrary& circuit_lib,
const FabricGlobalPortInfo& global_ports,
const SimulationSetting& sim_setting,
const bool& compact_routing_hierarchy) {
int print_pnr_sdc(
const PnrSdcOption& sdc_options, const DeviceContext& device_ctx,
const VprDeviceAnnotation& device_annotation, const FabricTile& fabric_tile,
const DeviceRRGSB& device_rr_gsb, const ModuleManager& module_manager,
const MuxLibrary& mux_lib, const CircuitLibrary& circuit_lib,
const FabricGlobalPortInfo& global_ports,
const SimulationSetting& sim_setting, const bool& compact_routing_hierarchy) {
/* Fabric tile is not supported yet, error out */
if (!fabric_tile.empty()) {
VTR_LOG_ERROR("Tile-based modules are not supported yet!\n");
return CMD_EXEC_FATAL_ERROR;
}
std::string top_module_name = generate_fpga_top_module_name();
ModuleId top_module = module_manager.find_module(top_module_name);
VTR_ASSERT(true == module_manager.valid_module_id(top_module));
@ -453,6 +458,8 @@ void print_pnr_sdc(const PnrSdcOption& sdc_options,
print_pnr_sdc_grid_hierarchy(sdc_options.sdc_dir(), device_ctx,
device_annotation, module_manager, top_module);
}
return CMD_EXEC_SUCCESS;
}
} /* end namespace openfpga */

17
openfpga/src/fpga_sdc/pnr_sdc_writer.h
View File

@ -10,6 +10,7 @@
#include "circuit_library.h"
#include "device_rr_gsb.h"
#include "fabric_global_port_info.h"
#include "fabric_tile.h"
#include "module_manager.h"
#include "mux_library.h"
#include "pnr_sdc_option.h"
@ -24,15 +25,13 @@
/* begin namespace openfpga */
namespace openfpga {
void print_pnr_sdc(const PnrSdcOption& sdc_options,
const DeviceContext& device_ctx,
const VprDeviceAnnotation& device_annotation,
const DeviceRRGSB& device_rr_gsb,
const ModuleManager& module_manager,
const MuxLibrary& mux_lib, const CircuitLibrary& circuit_lib,
const FabricGlobalPortInfo& global_ports,
const SimulationSetting& sim_setting,
const bool& compact_routing_hierarchy);
int print_pnr_sdc(
const PnrSdcOption& sdc_options, const DeviceContext& device_ctx,
const VprDeviceAnnotation& device_annotation, const FabricTile& fabric_tile,
const DeviceRRGSB& device_rr_gsb, const ModuleManager& module_manager,
const MuxLibrary& mux_lib, const CircuitLibrary& circuit_lib,
const FabricGlobalPortInfo& global_ports,
const SimulationSetting& sim_setting, const bool& compact_routing_hierarchy);
} /* end namespace openfpga */