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[core] code format

This commit is contained in:
tangxifan 2024-06-25 12:25:16 -07:00
parent 66af73e91e
commit 4640e74e7e
1 changed files with 3 additions and 3 deletions
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6
libs/libarchopenfpga/src/read_xml_tile_annotation.cpp
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@ -102,9 +102,9 @@ static void read_xml_tile_global_port_annotation(
.as_bool(false)); .as_bool(false));
/* Get clock tree attributes if this is a clock, reset or set */ /* Get clock tree attributes if this is a clock, reset or set */
if (tile_annotation.global_port_is_clock(tile_global_port_id) if (tile_annotation.global_port_is_clock(tile_global_port_id) ||
|| tile_annotation.global_port_is_reset(tile_global_port_id) tile_annotation.global_port_is_reset(tile_global_port_id) ||
|| tile_annotation.global_port_is_set(tile_global_port_id)) { tile_annotation.global_port_is_set(tile_global_port_id)) {
tile_annotation.set_global_port_clock_arch_tree_name( tile_annotation.set_global_port_clock_arch_tree_name(
tile_global_port_id, get_attribute(xml_tile, "clock_arch_tree_name", tile_global_port_id, get_attribute(xml_tile, "clock_arch_tree_name",
loc_data, pugiutil::ReqOpt::OPTIONAL) loc_data, pugiutil::ReqOpt::OPTIONAL)