From 4640e74e7e6e047d3f3f4eae7117d9ed8447a0ad Mon Sep 17 00:00:00 2001 From: tangxifan Date: Tue, 25 Jun 2024 12:25:16 -0700 Subject: [PATCH] [core] code format --- libs/libarchopenfpga/src/read_xml_tile_annotation.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/libs/libarchopenfpga/src/read_xml_tile_annotation.cpp b/libs/libarchopenfpga/src/read_xml_tile_annotation.cpp index c6ca09012..960f9352d 100644 --- a/libs/libarchopenfpga/src/read_xml_tile_annotation.cpp +++ b/libs/libarchopenfpga/src/read_xml_tile_annotation.cpp @@ -102,9 +102,9 @@ static void read_xml_tile_global_port_annotation( .as_bool(false)); /* Get clock tree attributes if this is a clock, reset or set */ - if (tile_annotation.global_port_is_clock(tile_global_port_id) - || tile_annotation.global_port_is_reset(tile_global_port_id) - || tile_annotation.global_port_is_set(tile_global_port_id)) { + if (tile_annotation.global_port_is_clock(tile_global_port_id) || + tile_annotation.global_port_is_reset(tile_global_port_id) || + tile_annotation.global_port_is_set(tile_global_port_id)) { tile_annotation.set_global_port_clock_arch_tree_name( tile_global_port_id, get_attribute(xml_tile, "clock_arch_tree_name", loc_data, pugiutil::ReqOpt::OPTIONAL)