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[test] typo

This commit is contained in:
tangxifan 2024-07-09 20:27:28 -07:00
parent 9ce4b57363
commit 43dbeafd44
1 changed files with 1 additions and 1 deletions
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2
openfpga_flow/tasks/basic_tests/clock_network/homo_1clock_1reset_2layer_on_lut/config/pin_constraints_rst.xml
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@ -3,6 +3,6 @@
- the reset signal to the op_reset[0] port of the FPGA fabric - the reset signal to the op_reset[0] port of the FPGA fabric
--> -->
<set_io pin="op_reset[0]" net="rst"/> <set_io pin="op_reset[0]" net="rst"/>
<set_io pin="op_clk[0]" net="OPEN"/> <set_io pin="op_clk[0]" net="clk"/>
</pin_constraints> </pin_constraints>