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[Test] Deploy the WLR test to the basic regression tests

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tangxifan 2021-09-20 11:21:58 -07:00
parent 60fc3ab36c
commit 3f6ac41868
1 changed files with 1 additions and 0 deletions
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openfpga_flow/regression_test_scripts/basic_reg_test.sh
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@ -55,6 +55,7 @@ run-task basic_tests/preconfig_testbench/memory_bank --debug --show_thread_logs
echo -e "Testing physical design friendly memory bank configuration protocol of a K4N4 FPGA";
run-task basic_tests/full_testbench/ql_memory_bank --debug --show_thread_logs
run-task basic_tests/full_testbench/ql_memory_bank_use_wlr --debug --show_thread_logs
echo -e "Testing testbenches without self checking features";
run-task basic_tests/full_testbench/full_testbench_without_self_checking --debug --show_thread_logs