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[core] remove restrictions on 1 clock tree definition

This commit is contained in:
tangxifan 2024-06-21 17:12:10 -07:00
parent ecd31955b1
commit 3f08b83b3a
1 changed files with 4 additions and 12 deletions
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16
openfpga/src/annotation/append_clock_rr_graph.cpp
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@ -525,8 +525,8 @@ static void add_rr_graph_block_clock_edges(
chan_coord, itree, ilvl, ClockTreePinId(ipin), node_dir)) {
/* Create edges */
VTR_ASSERT(rr_graph_view.valid_node(des_node));
rr_graph_builder.create_edge(
src_node, des_node, clk_ntwk.default_driver_switch(), false);
rr_graph_builder.create_edge(src_node, des_node,
clk_ntwk.default_driver_switch(), false);
edge_count++;
}
VTR_LOGV(verbose, "\tWill add %lu edges to other clock nodes\n",
@ -541,8 +541,8 @@ static void add_rr_graph_block_clock_edges(
itree, ClockTreePinId(ipin))) {
/* Create edges */
VTR_ASSERT(rr_graph_view.valid_node(des_node));
rr_graph_builder.create_edge(
src_node, des_node, clk_ntwk.default_tap_switch(), false);
rr_graph_builder.create_edge(src_node, des_node,
clk_ntwk.default_tap_switch(), false);
edge_count++;
}
VTR_LOGV(verbose, "\tWill add %lu edges to other IPIN\n",
@ -638,14 +638,6 @@ int append_clock_rr_graph(DeviceContext& vpr_device_ctx,
return CMD_EXEC_SUCCESS;
}
/* Report any clock structure we do not support yet! */
if (clk_ntwk.num_trees() > 1) {
VTR_LOG(
"Currently only support 1 clock tree in programmable clock "
"architecture\nPlease update your clock architecture definition\n");
return CMD_EXEC_FATAL_ERROR;
}
/* Estimate the number of nodes and pre-allocate */
size_t orig_num_nodes = vpr_device_ctx.rr_graph.num_nodes();
size_t num_clock_nodes = estimate_clock_rr_graph_num_nodes(