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Updating qlf_yosys.tcl file with correct condition to pick .so

This commit is contained in:
Lalit Sharma 2021-04-19 05:55:10 -07:00
parent d6d3b7e6a2
commit 3e5ebc3dc3
1 changed files with 5 additions and 3 deletions
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8
openfpga_flow/misc/qlf_yosys.tcl
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@ -1,8 +1,10 @@
# Yosys synthesis script for ${TOP_MODULE}
yosys -import
if { [info procs ql-qlf] == {} } { plugin -i ql-qlf }
yosys -import ;# ingest plugin commands
if { [info exists ::env(YOSYS)] } {
set yosys_dir [file dirname $env(YOSYS)]
if { [file exists $yosys_dir/../share/yosys/plugins/ql-qlf.so] == 1 } { plugin -i ql-qlf }
yosys -import ;# ingest plugin commands
}
# Read verilog files
${READ_VERILOG_FILE}