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Added routing benchmark

This commit is contained in:
CHARAS SAMY 2020-05-01 09:55:38 -06:00 committed by tangxifan
parent 69306faf22
commit 3c781b18d3
3 changed files with 45 additions and 0 deletions
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10
openfpga_flow/benchmarks/micro_benchmark/routing_test/routing_test.act Executable file
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@ -0,0 +1,10 @@
IN0 0.505000 0.204400
IN1 0.491000 0.206000
IN2 0.472000 0.204400
clk 0.500000 2.000000
OUT1 0.491000 0.206000
OUT0 0.505000 0.204400
OUT2 0.472000 0.204400
n15 0.491000 0.101146
n18 0.505000 0.103222
n21 0.472000 0.096477

16
openfpga_flow/benchmarks/micro_benchmark/routing_test/routing_test.blif Executable file
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# Benchmark "routing_test" written by ABC on Tue Apr 21 18:25:21 2020
.model routing_test
.inputs IN0 IN1 IN2 clk
.outputs OUT0 OUT1 OUT2
.latch n15 OUT1 re clk 2
.latch n18 OUT0 re clk 2
.latch n21 OUT2 re clk 2
.names IN1 n15
1 1
.names IN0 n18
1 1
.names IN2 n21
1 1
.end

19
openfpga_flow/benchmarks/micro_benchmark/routing_test/routing_test.v Normal file
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module routing_test(IN0,IN1,IN2,OUT0,OUT1,OUT2,clk);
input wire IN0,IN1,IN2,clk;
output reg OUT0, OUT1, OUT2;
always @(posedge clk)
begin
OUT0 <= IN0;
OUT1 <= IN1;
OUT2 <= IN2;
end
endmodule