riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Conversion from s to ns for the loop breaking delays

This commit is contained in:
Baudouin Chauviere 2019-05-06 16:12:30 -06:00
parent a5a1a376ab
commit 3b62f8e024
1 changed files with 10 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_sdc_pb_types.c
View File

@ -252,21 +252,23 @@ void dump_sdc_pb_graph_pin_interc(t_sram_orgz_info* cur_sram_orgz_info,
des_pb_graph_pin->input_edges[iedge]->nb_pin); des_pb_graph_pin->input_edges[iedge]->nb_pin);
if (NULL != des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_before_min) { if (NULL != des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_before_min) {
fprintf (fp, "set_min_delay -from %s -to %s/%s %s \n", from_path, set_disable_path, input_buffer_in, fprintf (fp, "set_min_delay -from %s -to %s/%s %f \n", from_path, set_disable_path, input_buffer_in,
des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_before_min); pow(10,9)*atof(des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_before_min));
} }
if (NULL != des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_before_max) { if (NULL != des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_before_max) {
fprintf (fp, "set_max_delay -from %s -to %s/%s %s \n", from_path, set_disable_path, input_buffer_in, fprintf (fp, "set_max_delay -from %s -to %s/%s %f \n", from_path, set_disable_path, input_buffer_in,
des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_before_max); pow(10,9)*atof(des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_before_max));
} }
fprintf (fp, "set_disable_timing -from %s -to %s %s \n", input_buffer_in, input_buffer_out, set_disable_path); fprintf (fp, "set_disable_timing -from %s -to %s %s \n", input_buffer_in, input_buffer_out, set_disable_path);
if (NULL != des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_after_min) { if (NULL != des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_after_min) {
fprintf (fp, "set_min_delay -from %s/%s -to %s %s \n", set_disable_path, input_buffer_out, fprintf (fp, "set_min_delay -from %s/%s -to %s %f \n", set_disable_path, input_buffer_out,
to_path, des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_after_min); to_path,
pow(10,9)*atof(des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_after_min));
} }
if (NULL != des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_after_max) { if (NULL != des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_after_max) {
fprintf (fp, "set_max_delay -from %s/%s -to %s %s \n", set_disable_path, input_buffer_out, fprintf (fp, "set_max_delay -from %s/%s -to %s %f \n", set_disable_path, input_buffer_out,
to_path, des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_after_max); to_path,
pow(10,9)*atof(des_pb_graph_pin->input_edges[iedge]->loop_breaker_delay_after_max));
} }
my_free(input_buffer_path); my_free(input_buffer_path);
my_free(set_disable_path); my_free(set_disable_path);