[Benchmark] Add 2-clock micro benchmark

This commit is contained in:
tangxifan 2021-01-12 17:48:52 -07:00
parent a0b9f2b40d
commit 3790f2c26a
2 changed files with 71 additions and 0 deletions

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module counter_2clock(clk0, q0, rst0, clk1, q1, rst1);
input clk0;
input rst0;
output [7:0] q0;
reg [7:0] q0;
input clk1;
input rst1;
output [7:0] q1;
reg [7:0] q1;
always @ (posedge clk0)
begin
if(rst0)
q0 <= 8'b00000000;
else
q0 <= q0 + 1;
end
always @ (posedge clk1)
begin
if(rst1)
q1 <= 8'b00000000;
else
q1 <= q1 + 1;
end
endmodule

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module counter_2clock_tb;
reg clk0, rst0;
wire [7:0] q0;
reg clk1, rst1;
wire [7:0] q1;
counter_2clock C_1(
clk0,
q0,
rst0);
counter_2clock C_1(
clk1,
q1,
rst1);
initial begin
#0 rst0 = 1'b1; clk0 = 1'b0;
#100 rst0 = 1'b0;
end
always begin
#10 clk0 = ~clk0;
end
initial begin
#0 rst1 = 1'b1; clk1 = 1'b0;
#100 rst1 = 1'b0;
end
always begin
#20 clk1 = ~clk1;
end
initial begin
#5000 $stop;
end
endmodule