[Benchmark] Add 2-clock micro benchmark
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module counter_2clock(clk0, q0, rst0, clk1, q1, rst1);
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input clk0;
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input rst0;
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output [7:0] q0;
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reg [7:0] q0;
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input clk1;
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input rst1;
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output [7:0] q1;
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reg [7:0] q1;
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always @ (posedge clk0)
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begin
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if(rst0)
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q0 <= 8'b00000000;
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else
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q0 <= q0 + 1;
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end
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always @ (posedge clk1)
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begin
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if(rst1)
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q1 <= 8'b00000000;
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else
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q1 <= q1 + 1;
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end
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endmodule
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module counter_2clock_tb;
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reg clk0, rst0;
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wire [7:0] q0;
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reg clk1, rst1;
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wire [7:0] q1;
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counter_2clock C_1(
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clk0,
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q0,
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rst0);
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counter_2clock C_1(
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clk1,
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q1,
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rst1);
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initial begin
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#0 rst0 = 1'b1; clk0 = 1'b0;
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#100 rst0 = 1'b0;
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end
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always begin
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#10 clk0 = ~clk0;
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end
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initial begin
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#0 rst1 = 1'b1; clk1 = 1'b0;
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#100 rst1 = 1'b0;
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end
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always begin
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#20 clk1 = ~clk1;
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end
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initial begin
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#5000 $stop;
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end
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endmodule
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