riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

[Engine] Fixed a critical bug which causes bitstream wrong for QuickLogic memory bank when fast configuration is enabled

This commit is contained in:
tangxifan 2021-10-01 18:27:42 -07:00
parent 477c1cd062
commit 2de6be44d6
1 changed files with 23 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
openfpga/src/utils/fabric_bitstream_utils.cpp
View File

@ -235,13 +235,34 @@ MemoryBankFabricBitstream build_memory_bank_fabric_bitstream_by_address(const Fa
MemoryBankFlattenFabricBitstream build_memory_bank_flatten_fabric_bitstream(const FabricBitstream& fabric_bitstream,
const bool& fast_configuration,
const bool& bit_value_to_skip) {
/* If fast configuration is not enabled, we need all the wl address even some of them have all-zero BLs */
if (!fast_configuration) {
vtr::vector<FabricBitRegionId, std::map<std::string, std::string>> fabric_bits_per_region;
fabric_bits_per_region.resize(fabric_bitstream.num_regions());
for (const FabricBitRegionId& region : fabric_bitstream.regions()) {
for (const FabricBitId& bit_id : fabric_bitstream.region_bits(region)) {
/* Create string for BL address */
std::string bl_addr_str(fabric_bitstream.bit_bl_address(bit_id).size(), bit_value_to_skip);
/* Create string for WL address */
std::string wl_addr_str;
for (const char& addr_bit : fabric_bitstream.bit_wl_address(bit_id)) {
wl_addr_str.push_back(addr_bit);
}
/* Deposit the config bit */
fabric_bits_per_region[region][wl_addr_str] = bl_addr_str;
}
}
}
/* Build the bitstream by each region, here we use (WL, BL) pairs when storing bitstreams */
vtr::vector<FabricBitRegionId, std::map<std::string, std::string>> fabric_bits_per_region;
fabric_bits_per_region.resize(fabric_bitstream.num_regions());
for (const FabricBitRegionId& region : fabric_bitstream.regions()) {
for (const FabricBitId& bit_id : fabric_bitstream.region_bits(region)) {
/* Only when fast configuration is required, skip din because they should be pre-configured through programming reset/set */
if (fast_configuration && fabric_bitstream.bit_din(bit_id) == bit_value_to_skip) {
/* Skip din because they should be pre-configured through programming reset/set */
if (fabric_bitstream.bit_din(bit_id) == bit_value_to_skip) {
continue;
}
/* Create string for BL address */