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Merge remote-tracking branch 'lnis_origin/dev' into ganesh_dev

This commit is contained in:
Ganesh Gore 2019-11-22 16:03:04 -07:00
parent 3f235a16f9 8cc72536d1
commit 2b465cf153
2 changed files with 3 additions and 2 deletions
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1
openfpga_flow/tasks/mcnc_big20/config/task.conf
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@ -160,5 +160,6 @@ vpr_fpga_verilog_explicit_mapping=
vpr_fpga_x2p_compact_routing_hierarchy= vpr_fpga_x2p_compact_routing_hierarchy=
# If you wish to run Modelsim verification in batch, turn on the ini file outputting # If you wish to run Modelsim verification in batch, turn on the ini file outputting
vpr_fpga_verilog_print_simulation_ini= vpr_fpga_verilog_print_simulation_ini=
# If you wish to run Modelsim verification in batch, turn off running iVerilog at the end of the flow
#end_flow_with_test= #end_flow_with_test=

4
vpr7_x2p/libarchfpga/SRC/check_circuit_library.cpp
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@ -208,8 +208,8 @@ size_t check_one_circuit_model_port_type_and_size_required(const CircuitLibrary&
num_ports_to_check, num_ports_to_check,
CIRCUIT_MODEL_PORT_TYPE_STRING[size_t(port_type_to_check)], CIRCUIT_MODEL_PORT_TYPE_STRING[size_t(port_type_to_check)],
CIRCUIT_MODEL_TYPE_STRING[size_t(circuit_lib.model_type(circuit_model))], CIRCUIT_MODEL_TYPE_STRING[size_t(circuit_lib.model_type(circuit_model))],
CIRCUIT_MODEL_PORT_TYPE_STRING[size_t(port_type_to_check)], ports.size(),
ports.size()); CIRCUIT_MODEL_PORT_TYPE_STRING[size_t(port_type_to_check)]);
num_err++; num_err++;
} }
for (const auto& port : ports) { for (const auto& port : ports) {