renaming files

vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_essential_gates.cpp

@@ -17,7 +17,7 @@
 /* FPGA-Verilog context header files */
 #include "verilog_global.h"
 #include "verilog_writer_utils.h"
-#include "verilog_submodule_essential.h"
+#include "verilog_essential_gates.h"
 
 
 /************************************************

vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_essential_gates.h

@@ -6,8 +6,8 @@
  * logic gates etc. 
  ***********************************************/
 
-#ifndef VERILOG_SUBMODULE_ESSENTIAL_H
-#define VERILOG_SUBMODULE_ESSENTIAL_H
+#ifndef VERILOG_ESSENTIAL_GATES_H
+#define VERILOG_ESSENTIAL_GATES_H
 
 #include <string>
 #include "circuit_library.h"

vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_mux.cpp

@@ -23,7 +23,7 @@
 /* FPGA-Verilog context header files */
 #include "verilog_global.h"
 #include "verilog_writer_utils.h"
-#include "verilog_submodule_mux.h"
+#include "verilog_mux.h"
 
 /***********************************************
  * Generate Verilog codes modeling an branch circuit 

vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_mux.h

@@ -2,8 +2,8 @@
  * Header file for verilog_submodule_mux.cpp
  **********************************************/
 
-#ifndef VERILOG_SUBMODULE_MUX_H
-#define VERILOG_SUBMODULE_MUX_H
+#ifndef VERILOG_MUX_H
+#define VERILOG_MUX_H
 
 /* Include other header files which are dependency on the function declared below */
 #include <fstream>

vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_submodules.c

@@ -39,7 +39,7 @@
 #include "verilog_submodules.h"
 
 #include "mux_utils.h"
-#include "verilog_submodule_mux.h"
+#include "verilog_mux.h"
 
 /***** Subroutines *****/