riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

bug fix in example scripts

This commit is contained in:
tangxifan 2020-07-26 22:10:04 -06:00
parent f687774452
commit 177de90822
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
openfpga_flow/OpenFPGAShellScripts/duplicated_grid_pin_example_script.openfpga
View File

@ -40,7 +40,7 @@ repack #--verbose
build_architecture_bitstream --verbose --write_file fabric_independent_bitstream.xml build_architecture_bitstream --verbose --write_file fabric_independent_bitstream.xml
# Build fabric-dependent bitstream # Build fabric-dependent bitstream
build_fabric_bitstream --verbose --file fabric_bitstream.xml --format build_fabric_bitstream --verbose --file fabric_bitstream.xml --format xml
# Write the Verilog netlist for FPGA fabric # Write the Verilog netlist for FPGA fabric
# - Enable the use of explicit port mapping in Verilog netlist # - Enable the use of explicit port mapping in Verilog netlist