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add notes about debugging the aib FPGA

This commit is contained in:
tangxifan 2020-04-12 19:07:53 -06:00
parent a614e5aad9
commit 11e9014542
1 changed files with 11 additions and 0 deletions
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11
openfpga_flow/tasks/openfpga_shell/io/aib/config/task.conf
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@ -17,6 +17,17 @@ timeout_each_job = 20*60
fpga_flow=vpr_blif fpga_flow=vpr_blif
openfpga_arch_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_mem16K_aib_40nm_openfpga.xml openfpga_arch_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_mem16K_aib_40nm_openfpga.xml
#####################################
# Debugging status
# Fail in the following cases
# - tileable routing is used
# - vpr routing is used
# - compressed routing is enabled/disabled
# - duplicated pin is enabled/disabled
#
# Therefore, this could be a bug in the VPR
####################################
[ARCHITECTURES] [ARCHITECTURES]
arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/arch/vpr_only_templates/k6_frac_N10_tileable_adder_chain_mem16K_aib_40nm.xml arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/arch/vpr_only_templates/k6_frac_N10_tileable_adder_chain_mem16K_aib_40nm.xml