From 11e90145427f72ae4cd98bc19a2bcd1c13669824 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Sun, 12 Apr 2020 19:07:53 -0600
Subject: [PATCH] add notes about debugging the aib FPGA

---
 .../tasks/openfpga_shell/io/aib/config/task.conf      | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/openfpga_flow/tasks/openfpga_shell/io/aib/config/task.conf b/openfpga_flow/tasks/openfpga_shell/io/aib/config/task.conf
index abb9c625f..2d08de621 100644
--- a/openfpga_flow/tasks/openfpga_shell/io/aib/config/task.conf
+++ b/openfpga_flow/tasks/openfpga_shell/io/aib/config/task.conf
@@ -17,6 +17,17 @@ timeout_each_job = 20*60
 fpga_flow=vpr_blif
 openfpga_arch_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_mem16K_aib_40nm_openfpga.xml
 
+#####################################
+# Debugging status 
+# Fail in the following cases
+# - tileable routing is used
+# - vpr routing is used
+# - compressed routing is enabled/disabled
+# - duplicated pin is enabled/disabled
+#
+# Therefore, this could be a bug in the VPR
+####################################
+
 [ARCHITECTURES]
 arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/arch/vpr_only_templates/k6_frac_N10_tileable_adder_chain_mem16K_aib_40nm.xml