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plug in module manager

This commit is contained in:
tangxifan 2019-08-23 17:39:29 -06:00
parent 8fc258cc93
commit 056c45321b
1 changed files with 1 additions and 1 deletions
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2
vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_writer_utils.cpp
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@ -120,7 +120,7 @@ void print_verilog_module_declaration(std::fstream& fp,
check_file_handler(fp); check_file_handler(fp);
print_verilog_module_definition(fp, module_manager.module_name(module_id)); print_verilog_module_definition(fp, module_manager.module_name(module_id));
print_verilog_module_ports(fp, module_manager, module_id); print_verilog_module_ports(fp, module_manager, module_id);
fp << std::endl << ");" << std::endl; fp << std::endl << ");" << std::endl;