OpenFPGA/libs/libarchopenfpga/src/tile_annotation.cpp

182 lines
6.5 KiB
C++
Raw Normal View History

2020-11-10 15:32:24 -06:00
/************************************************************************
* Member functions for class TileAnnotation
***********************************************************************/
#include "tile_annotation.h"
#include "vtr_assert.h"
2020-11-10 15:32:24 -06:00
/* namespace openfpga begins */
namespace openfpga {
/************************************************************************
* Constructors
***********************************************************************/
TileAnnotation::TileAnnotation() { return; }
2020-11-10 15:32:24 -06:00
/************************************************************************
* Public Accessors : aggregates
***********************************************************************/
TileAnnotation::global_port_range TileAnnotation::global_ports() const {
return vtr::make_range(global_port_ids_.begin(), global_port_ids_.end());
}
/************************************************************************
* Public Accessors
***********************************************************************/
std::string TileAnnotation::global_port_name(
const TileGlobalPortId& global_port_id) const {
2020-11-10 15:32:24 -06:00
VTR_ASSERT(valid_global_port_id(global_port_id));
return global_port_names_[global_port_id];
}
std::vector<std::string> TileAnnotation::global_port_tile_names(
const TileGlobalPortId& global_port_id) const {
2020-11-10 15:32:24 -06:00
VTR_ASSERT(valid_global_port_id(global_port_id));
return global_port_tile_names_[global_port_id];
}
std::vector<BasicPort> TileAnnotation::global_port_tile_ports(
const TileGlobalPortId& global_port_id) const {
2020-11-10 15:32:24 -06:00
VTR_ASSERT(valid_global_port_id(global_port_id));
return global_port_tile_ports_[global_port_id];
}
std::vector<vtr::Point<size_t>> TileAnnotation::global_port_tile_coordinates(
const TileGlobalPortId& global_port_id) const {
VTR_ASSERT(valid_global_port_id(global_port_id));
return global_port_tile_coordinates_[global_port_id];
}
bool TileAnnotation::global_port_is_clock(
const TileGlobalPortId& global_port_id) const {
2020-11-10 15:32:24 -06:00
VTR_ASSERT(valid_global_port_id(global_port_id));
return global_port_is_clock_[global_port_id];
}
bool TileAnnotation::global_port_is_set(
const TileGlobalPortId& global_port_id) const {
2020-11-10 15:32:24 -06:00
VTR_ASSERT(valid_global_port_id(global_port_id));
return global_port_is_set_[global_port_id];
}
bool TileAnnotation::global_port_is_reset(
const TileGlobalPortId& global_port_id) const {
2020-11-10 15:32:24 -06:00
VTR_ASSERT(valid_global_port_id(global_port_id));
return global_port_is_reset_[global_port_id];
}
size_t TileAnnotation::global_port_default_value(
const TileGlobalPortId& global_port_id) const {
2020-11-10 15:32:24 -06:00
VTR_ASSERT(valid_global_port_id(global_port_id));
return global_port_default_values_[global_port_id];
}
std::string TileAnnotation::global_port_clock_arch_tree_name(
const TileGlobalPortId& global_port_id) const {
VTR_ASSERT(valid_global_port_id(global_port_id));
return global_port_clock_arch_tree_names_[global_port_id];
}
2020-11-10 15:32:24 -06:00
/************************************************************************
* Public Mutators
***********************************************************************/
TileGlobalPortId TileAnnotation::create_global_port(
const std::string& port_name) {
/* Ensure that the name is unique */
std::map<std::string, TileGlobalPortId>::iterator it =
global_port_name2ids_.find(port_name);
if (it != global_port_name2ids_.end()) {
return TileGlobalPortId::INVALID();
}
2020-11-10 15:32:24 -06:00
/* This is a legal name. we can create a new id */
TileGlobalPortId port_id = TileGlobalPortId(global_port_ids_.size());
global_port_ids_.push_back(port_id);
global_port_names_.push_back(port_name);
global_port_tile_names_.emplace_back();
global_port_tile_ports_.emplace_back();
global_port_tile_coordinates_.emplace_back();
2020-11-10 15:32:24 -06:00
global_port_is_clock_.push_back(false);
global_port_clock_arch_tree_names_.emplace_back();
2020-11-10 15:32:24 -06:00
global_port_is_set_.push_back(false);
global_port_is_reset_.push_back(false);
global_port_default_values_.push_back(0);
/* Register in the name-to-id map */
global_port_name2ids_[port_name] = port_id;
2020-11-10 15:32:24 -06:00
return port_id;
}
void TileAnnotation::add_global_port_tile_information(
const TileGlobalPortId& global_port_id, const std::string& tile_name,
const BasicPort& tile_port, const vtr::Point<size_t>& tile_coord) {
VTR_ASSERT(valid_global_port_id(global_port_id));
global_port_tile_names_[global_port_id].push_back(tile_name);
global_port_tile_ports_[global_port_id].push_back(tile_port);
global_port_tile_coordinates_[global_port_id].push_back(tile_coord);
}
void TileAnnotation::set_global_port_is_clock(
const TileGlobalPortId& global_port_id, const bool& is_clock) {
2020-11-10 15:32:24 -06:00
VTR_ASSERT(valid_global_port_id(global_port_id));
global_port_is_clock_[global_port_id] = is_clock;
}
void TileAnnotation::set_global_port_clock_arch_tree_name(
const TileGlobalPortId& global_port_id, const std::string& clock_tree_name) {
VTR_ASSERT(valid_global_port_id(global_port_id));
global_port_clock_arch_tree_names_[global_port_id] = clock_tree_name;
}
void TileAnnotation::set_global_port_is_set(
const TileGlobalPortId& global_port_id, const bool& is_set) {
2020-11-10 15:32:24 -06:00
VTR_ASSERT(valid_global_port_id(global_port_id));
global_port_is_set_[global_port_id] = is_set;
}
void TileAnnotation::set_global_port_is_reset(
const TileGlobalPortId& global_port_id, const bool& is_reset) {
2020-11-10 15:32:24 -06:00
VTR_ASSERT(valid_global_port_id(global_port_id));
global_port_is_reset_[global_port_id] = is_reset;
}
void TileAnnotation::set_global_port_default_value(
const TileGlobalPortId& global_port_id, const size_t& default_value) {
2020-11-10 15:32:24 -06:00
VTR_ASSERT(valid_global_port_id(global_port_id));
global_port_default_values_[global_port_id] = default_value;
}
/************************************************************************
* Internal invalidators/validators
2020-11-10 15:32:24 -06:00
***********************************************************************/
/* Validators */
bool TileAnnotation::valid_global_port_id(
const TileGlobalPortId& global_port_id) const {
return (size_t(global_port_id) < global_port_ids_.size()) &&
(global_port_id == global_port_ids_[global_port_id]);
2020-11-10 15:32:24 -06:00
}
bool TileAnnotation::valid_global_port_attributes(
const TileGlobalPortId& global_port_id) const {
VTR_ASSERT(valid_global_port_id(global_port_id));
int attribute_counter = 0;
if (true == global_port_is_clock_[global_port_id]) {
attribute_counter++;
}
if (true == global_port_is_reset_[global_port_id]) {
attribute_counter++;
}
if (true == global_port_is_set_[global_port_id]) {
attribute_counter++;
}
return ((0 == attribute_counter) || (1 == attribute_counter));
}
} // namespace openfpga