OpenFPGA/openfpga/src/base/openfpga_context.h

75 lines
3.5 KiB
C
Raw Normal View History

#ifndef OPENFPGA_CONTEXT_H
#define OPENFPGA_CONTEXT_H
#include "vpr_context.h"
#include "openfpga_arch.h"
2020-01-29 18:49:33 -06:00
#include "vpr_netlist_annotation.h"
#include "vpr_device_annotation.h"
#include "vpr_clustering_annotation.h"
#include "vpr_routing_annotation.h"
2020-02-11 17:37:14 -06:00
#include "device_rr_gsb.h"
/********************************************************************
* This file includes the declaration of the date structure
* OpenfpgaContext, which is used for data exchange between
* different modules in OpenFPGA shell environment
*
* If a command of OpenFPGA needs to exchange data with other commands,
* it must use this data structure to access/mutate.
* In such case, you must add data structures to OpenfpgaContext
*
* Note:
* Please respect to the following rules when using the OpenfpgaContext
* 1. This data structure will be created only once in the main() function
* The data structure is design to be large and contain all the
* data structure required by each module of OpenFPGA core engine.
* Do NOT create or duplicate in your own module!
* 2. Be clear in your mind if you want to access/mutate the data inside OpenfpgaContext
* Read-only data should be accessed by
* const OpenfpgaContext&
* Mutate should use reference
* OpenfpgaContext&
* 3. Please keep the definition of OpenfpgaContext short
* Do put ONLY well-modularized data structure under this root.
* 4. We build this data structure based on the Context from VPR
* which does NOT allow users to copy the internal members
* This is due to that the data structures in the OpenFPGA context
* are typically big in terms of memory
*******************************************************************/
class OpenfpgaContext : public Context {
public: /* Public accessors */
const openfpga::Arch& arch() const { return arch_; }
const openfpga::VprDeviceAnnotation& vpr_device_annotation() const { return vpr_device_annotation_; }
2020-01-29 18:49:33 -06:00
const openfpga::VprNetlistAnnotation& vpr_netlist_annotation() const { return vpr_netlist_annotation_; }
const openfpga::VprClusteringAnnotation& vpr_clustering_annotation() const { return vpr_clustering_annotation_; }
const openfpga::VprRoutingAnnotation& vpr_routing_annotation() const { return vpr_routing_annotation_; }
2020-02-11 17:37:14 -06:00
const openfpga::DeviceRRGSB& device_rr_gsb() const { return device_rr_gsb_; }
public: /* Public mutators */
openfpga::Arch& mutable_arch() { return arch_; }
openfpga::VprDeviceAnnotation& mutable_vpr_device_annotation() { return vpr_device_annotation_; }
2020-01-29 18:49:33 -06:00
openfpga::VprNetlistAnnotation& mutable_vpr_netlist_annotation() { return vpr_netlist_annotation_; }
openfpga::VprClusteringAnnotation& mutable_vpr_clustering_annotation() { return vpr_clustering_annotation_; }
openfpga::VprRoutingAnnotation& mutable_vpr_routing_annotation() { return vpr_routing_annotation_; }
2020-02-11 17:37:14 -06:00
openfpga::DeviceRRGSB& mutable_device_rr_gsb() { return device_rr_gsb_; }
private: /* Internal data */
/* Data structure to store information from read_openfpga_arch library */
openfpga::Arch arch_;
2020-02-11 17:37:14 -06:00
/* Annotation to pb_type of VPR */
openfpga::VprDeviceAnnotation vpr_device_annotation_;
2020-02-11 17:37:14 -06:00
2020-01-29 18:49:33 -06:00
/* Naming fix to netlist */
openfpga::VprNetlistAnnotation vpr_netlist_annotation_;
2020-02-11 17:37:14 -06:00
/* TODO: Pin net fix to cluster results */
openfpga::VprClusteringAnnotation vpr_clustering_annotation_;
2020-02-11 17:37:14 -06:00
/* Routing results annotation */
openfpga::VprRoutingAnnotation vpr_routing_annotation_;
2020-02-11 17:37:14 -06:00
/* Device-level annotation */
openfpga::DeviceRRGSB device_rr_gsb_;
};
#endif