start developing the openfpga arch binding to vpr
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@ -789,6 +789,22 @@ struct t_pb_type {
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t_pin_to_pin_annotation* annotations = nullptr; /* [0..num_annotations-1] */
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int num_annotations = 0;
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/************************************************************************
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* Xifan Tang: Add useful methods for pb_type
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* - A pb_type is considered to be primitive when it has zero modes
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* However, this not always true. An exception is the LUT_CLASS
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* VPR added two modes by default to a LUT pb_type. Therefore,
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* for LUT_CLASS, it is a primitive when it is binded to a blif model
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* - A pb_type is the root pb_type when it has no parent mode
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************************************************************************/
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bool is_primitive() const {
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if (LUT_CLASS == class_type) {
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return nullptr != blif_model;
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}
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return 0 == num_modes;
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}
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bool is_root() const { return parent_mode == nullptr; }
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/* Power related members */
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t_pb_type_power* pb_type_power = nullptr;
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@ -3,6 +3,7 @@
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#include "vpr_context.h"
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#include "openfpga_arch.h"
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#include "vpr_pb_type_annotation.h"
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/********************************************************************
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* This file includes the declaration of the date structure
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@ -34,11 +35,15 @@
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class OpenfpgaContext : public Context {
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public: /* Public accessors */
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const openfpga::Arch& arch() const { return arch_; }
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const openfpga::VprPbTypeAnnotation& vpr_pb_type_annotation() const { return vpr_pb_type_annotation_; }
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public: /* Public mutators */
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openfpga::Arch& mutable_arch() { return arch_; }
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openfpga::VprPbTypeAnnotation& mutable_vpr_pb_type_annotation() { return vpr_pb_type_annotation_; }
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private: /* Internal data */
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/* Data structure to store information from read_openfpga_arch library */
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openfpga::Arch arch_;
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/* Annotation to pb_type of VPR */
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openfpga::VprPbTypeAnnotation vpr_pb_type_annotation_;
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};
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#endif
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@ -0,0 +1,86 @@
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/********************************************************************
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* This file includes functions to read an OpenFPGA architecture file
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* which are built on the libarchopenfpga library
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*******************************************************************/
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/* Headers from vtrutil library */
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#include "vtr_log.h"
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#include "vpr_pb_type_annotation.h"
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#include "openfpga_link_arch.h"
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/* Include global variables of VPR */
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#include "globals.h"
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/* begin namespace openfpga */
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namespace openfpga {
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/********************************************************************
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* This function will recursively traverse pb_type graph to ensure
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* 1. there is only a physical mode under each pb_type
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* 2. physical mode appears only when its parent is a physical mode.
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*******************************************************************/
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static
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void rec_check_pb_type_physical_mode(const t_pb_type& cur_pb_type) {
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/* We do not check any primitive pb_type */
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if (true == cur_pb_type.is_primitive()) {
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return;
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}
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/* For non-primitive pb_type: we should iterate over each mode
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* Ensure there is only one physical mode
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*/
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/* Traverse all the modes for identifying idle mode */
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for (int imode = 0; cur_pb_type.num_modes; ++imode) {
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/* Check each pb_type_child */
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for (int ichild = 0; ichild < cur_pb_type.modes[imode].num_pb_type_children; ++ichild) {
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rec_check_pb_type_physical_mode(cur_pb_type.modes[imode].pb_type_children[ichild]);
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}
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}
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}
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/********************************************************************
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* This function will
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* - identify the physical pb_type for each multi-mode pb_type in
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* VPR pb_type graph
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* - identify the physical pb_type for operating pb_types in VPR
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*******************************************************************/
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static
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void build_physical_pb_type_vpr_annotation(const DeviceContext& vpr_device_ctx,
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const Arch& openfpga_arch,
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VprPbTypeAnnotation& vpr_pb_type_annotation) {
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/* Walk through the pb_type annotation stored in the openfpga arch */
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for (const PbTypeAnnotation& pb_type_annotation : openfpga_arch.pb_type_annotations) {
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/* Pb type information are located at the logic_block_types in the device context of VPR
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* We iterate over the vectors and annotate the pb_type
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*/
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for (const t_logical_block_type& lb_type : vpr_device_ctx.logical_block_types) {
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/* By pass nullptr for pb_type head */
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if (nullptr == lb_type.pb_type) {
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continue;
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}
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}
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}
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}
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/********************************************************************
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* Top-level function to link openfpga architecture to VPR, including:
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* - physical pb_type
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* - idle pb_type
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* - circuit models for pb_type, pb interconnect and routing architecture
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*******************************************************************/
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void link_arch(OpenfpgaContext& openfpga_context) {
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/* Annotate physical pb_type in the VPR pb_type graph */
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build_physical_pb_type_vpr_annotation(g_vpr_ctx.device(), openfpga_context.arch(),
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openfpga_context.mutable_vpr_pb_type_annotation());
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/* Annotate idle pb_type in the VPR pb_type graph */
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/* Link physical pb_type to circuit model */
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/* Link routing architecture to circuit model */
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}
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} /* end namespace openfpga */
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@ -0,0 +1,22 @@
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#ifndef OPENFPGA_LINK_ARCH_COMMAND_H
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#define OPENFPGA_LINK_ARCH_COMMAND_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include "command.h"
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#include "command_context.h"
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#include "openfpga_context.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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/* begin namespace openfpga */
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namespace openfpga {
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void link_arch(OpenfpgaContext& openfpga_context);
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} /* end namespace openfpga */
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#endif
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@ -4,6 +4,7 @@
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* - read_openfpga_arch : read OpenFPGA architecture file
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*******************************************************************/
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#include "openfpga_read_arch.h"
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#include "openfpga_link_arch.h"
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#include "openfpga_setup_command.h"
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/* begin namespace openfpga */
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@ -36,8 +37,23 @@ void add_openfpga_setup_commands(openfpga::Shell<OpenfpgaContext>& shell) {
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ShellCommandId shell_cmd_write_arch_id = shell.add_command(shell_cmd_write_arch, "write OpenFPGA architecture file");
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shell.set_command_class(shell_cmd_write_arch_id, openfpga_setup_cmd_class);
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shell.set_command_const_execute_function(shell_cmd_write_arch_id, write_arch);
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/* The 'write_openfpga_arch' command should be executed before 'read_openfpga_arch' */
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/* The 'write_openfpga_arch' command should NOT be executed before 'read_openfpga_arch' */
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shell.set_command_dependency(shell_cmd_write_arch_id, std::vector<ShellCommandId>(1, shell_cmd_read_arch_id));
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/* Command 'link_openfpga_arch' */
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Command shell_cmd_link_openfpga_arch("link_openfpga_arch");
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/* Add command 'link_openfpga_arch' to the Shell */
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ShellCommandId shell_cmd_link_openfpga_arch_id = shell.add_command(shell_cmd_link_openfpga_arch, "Bind OpenFPGA architecture to VPR");
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shell.set_command_class(shell_cmd_link_openfpga_arch_id, openfpga_setup_cmd_class);
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shell.set_command_execute_function(shell_cmd_link_openfpga_arch_id, link_arch);
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/* The 'link_openfpga_arch' command should NOT be executed before 'read_openfpga_arch' and 'vpr' */
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const ShellCommandId& shell_cmd_vpr_id = shell.command("vpr");
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std::vector<ShellCommandId> cmd_dependency_link_openfpga_arch;
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cmd_dependency_link_openfpga_arch.push_back(shell_cmd_read_arch_id);
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cmd_dependency_link_openfpga_arch.push_back(shell_cmd_vpr_id);
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shell.set_command_dependency(shell_cmd_link_openfpga_arch_id, cmd_dependency_link_openfpga_arch);
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}
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} /* end namespace openfpga */
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@ -0,0 +1,18 @@
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/************************************************************************
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* Member functions for class VprPbTypeAnnotation
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***********************************************************************/
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#include "vtr_log.h"
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#include "vtr_assert.h"
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#include "vpr_pb_type_annotation.h"
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/* namespace openfpga begins */
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namespace openfpga {
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/************************************************************************
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* Constructors
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***********************************************************************/
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VprPbTypeAnnotation::VprPbTypeAnnotation() {
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return;
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}
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} /* End namespace openfpga*/
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@ -0,0 +1,39 @@
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#ifndef VPR_PB_TYPE_ANNOTATION_H
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#define VPR_PB_TYPE_ANNOTATION_H
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/********************************************************************
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* Include header files required by the data structure definition
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*******************************************************************/
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#include <map>
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/* Header from archfpga library */
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#include "physical_types.h"
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/* Header from openfpgautil library */
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#include "circuit_library.h"
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/* Begin namespace openfpga */
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namespace openfpga {
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/********************************************************************
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* This is the critical data structure to link the pb_type in VPR
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* to openfpga annotations
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* With a given pb_type pointer, it aims to identify:
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* 1. if the pb_type is a physical pb_type or a operating pb_type
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* 2. what is the circuit model id linked to a physical pb_type
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* 3. what is the physical pb_type for an operating pb_type
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* 4. what is the mode pointer that represents the physical mode for a pb_type
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*******************************************************************/
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class VprPbTypeAnnotation {
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public: /* Constructor */
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VprPbTypeAnnotation();
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private: /* Internal data */
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std::map<t_pb_type*, bool> is_physical_pb_types_;
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std::map<t_pb_type*, t_pb_type*> physical_pb_types_;
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std::map<t_pb_type*, t_mode*> physical_pb_modes_;
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std::map<t_pb_type*, CircuitModelId> pb_type_circuit_models_;
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};
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} /* End namespace openfpga*/
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#endif
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