2020-01-27 18:43:22 -06:00
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# Run VPR for the s298 design
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vpr ./test_vpr_arch/k6_N10_40nm.xml ./test_blif/s298.blif
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# Read OpenFPGA architecture definition
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read_openfpga_arch -f ./test_openfpga_arch/k6_N10_40nm_openfpga.xml
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# Annotate the OpenFPGA architecture to VPR data base
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link_openfpga_arch
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2020-01-28 18:04:10 -06:00
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2020-01-29 17:23:41 -06:00
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# Check and correct any naming conflicts in the BLIF netlist
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2020-01-29 22:53:56 -06:00
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check_netlist_naming_conflict --fix --report ./netlist_renaming.xml
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2020-01-29 17:23:41 -06:00
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2020-01-28 18:04:10 -06:00
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# Finish and exit OpenFPGA
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exit
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