2020-01-27 16:31:12 -06:00
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/********************************************************************
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* This file includes functions to read an OpenFPGA architecture file
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* which are built on the libarchopenfpga library
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*******************************************************************/
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/* Headers from vtrutil library */
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2020-01-27 21:40:18 -06:00
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#include "vtr_time.h"
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2020-01-27 18:43:22 -06:00
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#include "vtr_assert.h"
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2020-01-27 16:31:12 -06:00
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#include "vtr_log.h"
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#include "vpr_pb_type_annotation.h"
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#include "pb_type_utils.h"
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2020-01-28 16:13:14 -06:00
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#include "annotate_pb_types.h"
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2020-01-27 16:31:12 -06:00
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#include "openfpga_link_arch.h"
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/* Include global variables of VPR */
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#include "globals.h"
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/* begin namespace openfpga */
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namespace openfpga {
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/********************************************************************
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* Top-level function to link openfpga architecture to VPR, including:
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* - physical pb_type
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2020-01-28 16:13:14 -06:00
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* - mode selection bits for pb_type and pb interconnect
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* - circuit models for pb_type and pb interconnect
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* - physical pb_graph nodes and pb_graph pins
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* - circuit models for global routing architecture
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2020-01-27 16:31:12 -06:00
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*******************************************************************/
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void link_arch(OpenfpgaContext& openfpga_context) {
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2020-01-27 21:40:18 -06:00
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vtr::ScopedStartFinishTimer timer("Link OpenFPGA architecture to VPR architecture");
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2020-01-28 16:13:14 -06:00
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/* Annotate pb_type graphs
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* - physical pb_type
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* - mode selection bits for pb_type and pb interconnect
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* - circuit models for pb_type and pb interconnect
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*/
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annotate_pb_types(g_vpr_ctx.device(), openfpga_context.arch(),
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openfpga_context.mutable_vpr_pb_type_annotation());
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2020-01-27 16:31:12 -06:00
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/* Link routing architecture to circuit model */
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}
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} /* end namespace openfpga */
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