2020-01-15 21:28:04 -06:00
|
|
|
#ifndef OPENFPGA_ARCH_H
|
|
|
|
#define OPENFPGA_ARCH_H
|
2020-01-12 23:39:38 -06:00
|
|
|
|
2020-01-19 15:44:27 -06:00
|
|
|
#include <map>
|
|
|
|
|
2020-01-12 23:39:38 -06:00
|
|
|
#include "circuit_library.h"
|
2020-01-17 17:44:57 -06:00
|
|
|
#include "technology_library.h"
|
2020-01-18 13:51:25 -06:00
|
|
|
#include "simulation_setting.h"
|
2020-01-18 22:19:20 -06:00
|
|
|
#include "config_protocol.h"
|
2020-01-12 23:39:38 -06:00
|
|
|
|
2020-01-16 21:22:56 -06:00
|
|
|
/* namespace openfpga begins */
|
|
|
|
namespace openfpga {
|
|
|
|
|
2020-01-12 23:39:38 -06:00
|
|
|
/* A unified data structure to store circuit-level settings,
|
|
|
|
* including circuit library, technology library and simulation parameters
|
2020-01-19 15:44:27 -06:00
|
|
|
*
|
|
|
|
* Note:
|
|
|
|
* Once this struct is built by function read_xml_openfpga_arch()
|
|
|
|
* It should be READ-ONLY! Any modification should not be applied later
|
|
|
|
* This is to keep everything well modularized
|
2020-01-12 23:39:38 -06:00
|
|
|
*/
|
2020-01-16 21:22:56 -06:00
|
|
|
struct Arch {
|
2020-01-19 15:44:27 -06:00
|
|
|
/* Circuit models */
|
2020-01-12 23:39:38 -06:00
|
|
|
CircuitLibrary circuit_lib;
|
2020-01-19 15:44:27 -06:00
|
|
|
|
|
|
|
/* Technology devices */
|
2020-01-17 17:44:57 -06:00
|
|
|
TechnologyLibrary tech_lib;
|
2020-01-19 15:44:27 -06:00
|
|
|
|
|
|
|
/* Simulation settings */
|
2020-01-18 13:51:25 -06:00
|
|
|
SimulationSetting sim_setting;
|
2020-01-19 15:44:27 -06:00
|
|
|
|
|
|
|
/* Configuration protocol settings */
|
2020-01-18 22:19:20 -06:00
|
|
|
ConfigProtocol config_protocol;
|
2020-01-19 15:44:27 -06:00
|
|
|
|
|
|
|
/* Mapping from the names of routing switches
|
|
|
|
* to circuit models in circuit library
|
|
|
|
*/
|
|
|
|
std::map<std::string, CircuitModelId> cb_switch2circuit;
|
|
|
|
std::map<std::string, CircuitModelId> sb_switch2circuit;
|
|
|
|
|
|
|
|
/* Mapping from the names of routing segments
|
|
|
|
* to circuit models in circuit library
|
|
|
|
*/
|
|
|
|
std::map<std::string, CircuitModelId> routing_seg2circuit;
|
2020-01-19 16:00:19 -06:00
|
|
|
|
|
|
|
/* Mapping from the names of direct connection
|
|
|
|
* to circuit models in circuit library
|
|
|
|
*/
|
|
|
|
std::map<std::string, CircuitModelId> direct2circuit;
|
2020-01-12 23:39:38 -06:00
|
|
|
};
|
|
|
|
|
2020-01-16 21:22:56 -06:00
|
|
|
} /* namespace openfpga ends */
|
|
|
|
|
2020-01-12 23:39:38 -06:00
|
|
|
#endif
|