OpenFPGA/yosys/examples/osu035/example.ys

12 lines
251 B
Plaintext
Raw Normal View History

read_verilog example.v
read_liberty -lib osu035_stdcells.lib
synth -top top
dfflibmap -liberty osu035_stdcells.lib
abc -D 10000 -constr example.constr -liberty osu035_stdcells.lib
opt_clean
stat -liberty osu035_stdcells.lib
write_edif example.edif