OpenFPGA/vpr7_x2p/vpr/SRC/fpga_x2p/bitstream/fpga_bitstream.h

19 lines
820 B
C
Raw Normal View History

2019-04-26 13:23:47 -05:00
void encode_decoder_addr(int input,
int decoder_size, char* addr);
void dump_fpga_spice_bitstream(const char* bitstream_file_name,
const char* circuit_name,
2019-04-26 13:23:47 -05:00
t_sram_orgz_info* cur_sram_orgz_info);
void vpr_fpga_generate_bitstream(t_vpr_setup vpr_setup,
t_arch Arch,
const char* circuit_name,
const char* bitstream_file_path,
2019-04-26 13:23:47 -05:00
t_sram_orgz_info** cur_sram_orgz_info);
void vpr_fpga_bitstream_generator(t_vpr_setup vpr_setup,
t_arch Arch,
char* circuit_name,
t_sram_orgz_info** cur_sram_orgz_info);