OpenFPGA/vpr7_x2p/vpr/SRC/fpga_x2p/bitstream
tangxifan e456b6f905 replace spice_models with circuit model in bitstream generator 2019-08-16 16:36:49 -06:00
..
fpga_bitstream.c start refactoring the bitstream part using spice_models 2019-08-16 15:58:14 -06:00
fpga_bitstream.h start refactoring the bitstream part using spice_models 2019-08-16 15:58:14 -06:00
fpga_bitstream_pbtypes.c added Switch Block SubType and SubFs for tileable rr_graph generation 2019-07-02 10:00:02 -06:00
fpga_bitstream_pbtypes.h Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00
fpga_bitstream_primitives.c Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00
fpga_bitstream_primitives.h Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00
fpga_bitstream_routing.c replace spice_models with circuit model in bitstream generator 2019-08-16 16:36:49 -06:00
fpga_bitstream_routing.h replace spice_models with circuit model in bitstream generator 2019-08-16 16:36:49 -06:00