35 lines
1.4 KiB
C
35 lines
1.4 KiB
C
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#ifndef VERILOG_PRECONFIG_TOP_MODULE_H
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#define VERILOG_PRECONFIG_TOP_MODULE_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include <vector>
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#include <string>
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#include "circuit_types.h"
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#include "vpr_types.h"
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#include "module_manager.h"
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#include "bitstream_manager.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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/* begin namespace openfpga */
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namespace openfpga {
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void print_verilog_preconfig_top_module(const ModuleManager& module_manager,
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const BitstreamManager& bitstream_manager,
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const CircuitLibrary& circuit_lib,
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const std::vector<CircuitPortId>& global_ports,
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const AtomContext& atom_ctx,
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const PlacementContext& place_ctx,
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const IoLocationMap& io_location_map,
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const std::string& circuit_name,
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const std::string& verilog_fname,
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const std::string& verilog_dir);
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} /* end namespace openfpga */
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#endif
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