2020-07-04 18:31:34 -05:00
|
|
|
#!/bin/bash
|
|
|
|
|
|
|
|
|
|
set -e
|
|
|
|
|
|
|
|
|
|
start_section "OpenFPGA.TaskTun" "${GREEN}..Running_Regression..${NC}"
|
|
|
|
|
cd ${TRAVIS_BUILD_DIR}
|
|
|
|
|
|
|
|
|
|
###############################################
|
|
|
|
|
# OpenFPGA Shell with VPR8
|
|
|
|
|
##############################################
|
|
|
|
|
echo -e "Basic regression tests";
|
|
|
|
|
|
|
|
|
|
echo -e "Testing configuration chain of a K4N4 FPGA";
|
2020-07-27 18:18:59 -05:00
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/full_testbench/configuration_chain --debug --show_thread_logs
|
|
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/full_testbench/fast_configuration_chain --debug --show_thread_logs
|
|
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/preconfig_testbench/configuration_chain --debug --show_thread_logs
|
2020-07-04 18:31:34 -05:00
|
|
|
|
|
|
|
|
echo -e "Testing fram-based configuration protocol of a K4N4 FPGA";
|
2020-07-27 18:18:59 -05:00
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/full_testbench/configuration_frame --debug --show_thread_logs
|
|
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/full_testbench/fast_configuration_frame --debug --show_thread_logs
|
|
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/preconfig_testbench/configuration_frame --debug --show_thread_logs
|
2020-07-04 18:31:34 -05:00
|
|
|
|
|
|
|
|
echo -e "Testing memory bank configuration protocol of a K4N4 FPGA";
|
2020-07-27 18:18:59 -05:00
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/full_testbench/memory_bank --debug --show_thread_logs
|
|
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/full_testbench/fast_memory_bank --debug --show_thread_logs
|
|
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/preconfig_testbench/memory_bank --debug --show_thread_logs
|
2020-07-04 18:31:34 -05:00
|
|
|
|
|
|
|
|
echo -e "Testing standalone (flatten memory) configuration protocol of a K4N4 FPGA";
|
2020-07-27 18:18:59 -05:00
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/full_testbench/flatten_memory --debug --show_thread_logs
|
|
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/preconfig_testbench/flatten_memory --debug --show_thread_logs
|
2020-07-04 18:31:34 -05:00
|
|
|
|
|
|
|
|
echo -e "Testing fabric Verilog generation only";
|
2020-07-27 18:18:59 -05:00
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/generate_fabric --debug --show_thread_logs
|
2020-07-04 18:31:34 -05:00
|
|
|
|
|
|
|
|
echo -e "Testing Verilog testbench generation only";
|
2020-07-27 18:18:59 -05:00
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/generate_testbench --debug --show_thread_logs
|
2020-07-04 18:31:34 -05:00
|
|
|
|
|
|
|
|
echo -e "Testing user-defined simulation settings: clock frequency and number of cycles";
|
2020-07-27 18:18:59 -05:00
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/fixed_simulation_settings --debug --show_thread_logs
|
2020-07-04 18:31:34 -05:00
|
|
|
|
2020-09-22 12:43:34 -05:00
|
|
|
echo -e "Testing K4 series FPGA";
|
|
|
|
|
echo -e "Testing K4N4 with facturable LUTs";
|
|
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/k4_series/k4n4_frac_lut --debug --show_thread_logs
|
|
|
|
|
echo -e "Testing K4N4 with hard adders";
|
|
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/k4_series/k4n4_adder --debug --show_thread_logs
|
2020-09-22 12:49:16 -05:00
|
|
|
echo -e "Testing K4N4 without local routing architecture";
|
|
|
|
|
python3 openfpga_flow/scripts/run_fpga_task.py basic_tests/k4_series/k4n4_no_local_routing --debug --show_thread_logs
|
2020-09-22 12:43:34 -05:00
|
|
|
|
2020-07-04 18:31:34 -05:00
|
|
|
end_section "OpenFPGA.TaskTun"
|
