30 lines
1.6 KiB
BibTeX
30 lines
1.6 KiB
BibTeX
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% This should the last document processed by sphinx (to resolve all citations). hence
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% the z_ prefix to the filename
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@INPROCEEDINGS{XTang_ICCD_2015,
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author={X. Tang and P. Gaillardon and G. De Micheli},
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booktitle={2015 33rd IEEE International Conference on Computer Design (ICCD)},
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title={FPGA-SPICE: A simulation-based power estimation framework for FPGAs},
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year={2015},
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volume={},
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number={},
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pages={696-703},
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keywords={circuit simulation;field programmable gate arrays;logic design;power consumption;SPICE;table lookup;flip-flops;global routing architecture;circuit elements;grid-level testbenches;full-chip-level testbenches;component-level testbenches;architectural description language;LUTs;FPGAs routing multiplexers;look up tables;power consumption;analytical power models;probabilistic activity estimation;field programmable gate array;simulation-based power estimation framework;FPGA-SPICE;Field programmable gate arrays;Routing;Integrated circuit modeling;Estimation;SPICE;Table lookup},
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doi={10.1109/ICCD.2015.7357183},
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ISSN={},
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month={Oct},}
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@ARTICLE{XTang_JETCAS_2018,
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author={X. Tang and E. Giacomin and G. De Micheli and P. Gaillardon},
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journal={IEEE Journal on Emerging and Selected Topics in Circuits and Systems},
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title={Post-P amp;R Performance and Power Analysis for RRAM-Based FPGAs},
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year={2018},
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volume={8},
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number={3},
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pages={639-650},
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keywords={Field programmable gate arrays;Random access memory;Analytical models;Delays;Resistance;Routing;Programmable logic arrays;resistive ram;simulation;system modeling;integrated circuit reliability},
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doi={10.1109/JETCAS.2018.2847600},
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ISSN={2156-3357},
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month={Sept},}
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