OpenFPGA/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_api.h

#ifndef VERILOG_API_H 
#define VERILOG_API_H 

#include "vpr_types.h"
#include "mux_library.h"
#include "module_manager.h"

void vpr_fpga_verilog(ModuleManager& module_manager,
                      const MuxLibrary& mux_lib,
                      t_vpr_setup vpr_setup,
                      t_arch Arch,
                      char* circuit_name);

#endif
plug in module graph to feed verilog writers 2019-10-18 22:59:22 -05:00			`#ifndef VERILOG_API_H`
			`#define VERILOG_API_H`
Update VPR7 X2P with new engine 2019-04-26 13:23:47 -05:00
plug in module graph to feed verilog writers 2019-10-18 22:59:22 -05:00			`#include "vpr_types.h"`
move mux_lib to fpga_x2p_setup 2019-10-19 20:13:52 -05:00			`#include "mux_library.h"`
plug in module graph to feed verilog writers 2019-10-18 22:59:22 -05:00			`#include "module_manager.h"`

			`void vpr_fpga_verilog(ModuleManager& module_manager,`
move mux_lib to fpga_x2p_setup 2019-10-19 20:13:52 -05:00			`const MuxLibrary& mux_lib,`
plug in module graph to feed verilog writers 2019-10-18 22:59:22 -05:00			`t_vpr_setup vpr_setup,`
Update VPR7 X2P with new engine 2019-04-26 13:23:47 -05:00			`t_arch Arch,`
			`char* circuit_name);`
plug in module graph to feed verilog writers 2019-10-18 22:59:22 -05:00
			`#endif`