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Jean-Paul Chaput 24dedce09c Added core2chip support for Phenitec80.
This commit degrades the run success rate of ARMv2a to 87% (40 iters).
* New: In CRLcore/etc/.../kite.conf, add configuration parameters:
      katana.termSatReservedlocal
      katana.termSatthreshold
    for the new edge capacity computation system.
* New: In CRLcore/etc/symbolic/phenitec06/, add support for N. Shimizu
    small I/O pads (supplied in phlib80). Tune various parameters of
    Anabatic/Katana to increase routing success.
* Change: In CRLcore/alliance/ap/ApParser, make Pin external components,
    so RoutingPad will be build upon in global routing.
      Do not complain when a I/O pad has a physical instance that did
    not exists in the netlist. Just create it (appeared in phlib80).
      When no netlist instance exists in a pad, the pad Cell is still
    considered as terminal.
* New: In Etesian::BloatCells, new profile named "3metals" better suited
    for two routing metals technologies (i.e. Phenitec).
* New: In Anabatic::RawGCellsUnder, new CTOR which take only source &
    target points instead of a segment. Needed to manage wide segment for
    which the axis to consider is not that of the segment (one axis for
    each track it intersect).
* New: In Anabatic::GCell, add a RoutingPad count attribute, for Edge
    reservation computation.
* New: In AnabaticEngine::computeEdgeCapacities(), instead of decreasing
    all edges of a fixed amount (hTrackReservedLocal), guess the GCell
    cluttering from the number of RoutingPads that it contains.
      For non-saturated GCells, the four edges are decreased by the number
    of RoutingPads. We use the maximum from the two neigboring GCells.
    The hTrackReservedLocal parameter is now used only as a *maximum*
    that the edge reservation can reach.
      If a GCell is saturated (more than 8 RoutingPads, the saturation is
    propagated horizontally to 2 neigboring GCells).
* Change: In AutoContactTerminal::getNativeConstraintBox(), use a more
    flexible gauge name matching for terminal vertical extensions correction.
    Namely, match all "msxlib*" kind of gauges.
* Change: In AutoSegment::setAxis(), add the ability to force the axis
    position, even if it is a non-canonical segment. Maybe needed in the
    initialisation steo, before the first canonisation is performed.
* New: In NetBuilder, added new methods _do_1G_1PinM1() and _do_2G_1PinM1(),
    to manage coronas for Phenitec designs.
      To avoid various side effects from segments being too close from
    the north / east side of the routing area, make those segments fixeds.
* Change: In KatanaEngine::annotateGlobalGraph(), the management of wide
    wires was wrong. The axis to use to find the underlying GCells is the
    one of the track, not of the segment. This was creating bad edge
    capacity computation under the power ring of a block and subsequently
    routing failures.
* New: In Kanata::Manipulator, added method reprocessParallels(), not used
    though, but keep it anyway, might be of use later...
* New: In Kanata::Manipulator, added method avoidBlockage() for terminal
    METAL2 in non-preferred direction, restrict the terminal and turn
    constraint box at the current position of the perpandicular, so it
    doesn't create a deadlock in METAL2.
* Change: In SegmentFsm::conflictSolveByPlaceds(), if we cannot break
    using the whole overlap, try the first atomic overlap.
* New: In SegmentFsm::_slackenStrap(), manage conflict between a non-prefered
    segment and a blockage, this when to call avoidBlockage()...
* New: In Katana::Configuration, management of the new edge computation
    parameters:
      katana.termSatReservedlocal
      katana.termSatthreshold
* New: In Cumulus/plugins/Core2Chip, support for Phenitec I/O pads.
2019-09-17 17:05:54 +02:00
anabatic Added core2chip support for Phenitec80. 2019-09-17 17:05:54 +02:00
bootstrap Adapt socInstaller to the new SL7 & benchmarks. 2019-05-26 15:41:24 +02:00
bora Make FLUTE an independant tool in the Coriolis git repository. 2019-02-12 12:48:52 +01:00
coloquinte Pin management implemented for NetBuilderHV. 2019-03-10 13:25:43 +01:00
crlcore Added core2chip support for Phenitec80. 2019-09-17 17:05:54 +02:00
cumulus Added core2chip support for Phenitec80. 2019-09-17 17:05:54 +02:00
documentation Typos corrigees dans Hurricane et Python Tutorial 2019-06-04 14:34:20 +02:00
equinox Compliance with cmake 3.0 (Debian 9.2). Corrects all warnings. 2017-12-02 14:30:05 +01:00
etesian Added core2chip support for Phenitec80. 2019-09-17 17:05:54 +02:00
flute Patch flute to be compatible with boost 1.65. 2019-03-04 12:34:43 +01:00
hurricane ioNet used as "enable" should not get the name of the pad. 2019-08-09 18:45:19 +02:00
ispd Various typos correction (courtesy of G. Gouvine). 2019-07-30 13:13:57 +02:00
karakaze Support for mixing real pads & symbolic core. Wrapper around s2r. 2019-05-22 14:34:32 +02:00
katabatic Various typos correction (courtesy of G. Gouvine). 2019-07-30 13:13:57 +02:00
katana Added core2chip support for Phenitec80. 2019-09-17 17:05:54 +02:00
kite Various typos correction (courtesy of G. Gouvine). 2019-07-30 13:13:57 +02:00
knik Various typos correction (courtesy of G. Gouvine). 2019-07-30 13:13:57 +02:00
lefdef Various typos correction (courtesy of G. Gouvine). 2019-07-30 13:13:57 +02:00
mauka Happy New Year 2018 ! Update license years... 2018-01-06 17:55:44 +01:00
metis Happy New Year 2018 ! Update license years... 2018-01-06 17:55:44 +01:00
nimbus Add a fully generated documentation in the git repository. 2018-06-06 18:42:26 +02:00
oroshi Full update of the generated documentation for version 2.3 2019-05-27 18:49:51 +02:00
solstice Compliance with cmake 3.0 (Debian 9.2). Corrects all warnings. 2017-12-02 14:30:05 +01:00
stratus1 Various bug corrections to pass the alliance-check-toolkit reference benchs. 2019-05-24 23:57:22 +02:00
tutorial Various typos correction (courtesy of G. Gouvine). 2019-07-30 13:13:57 +02:00
unicorn Improve the management of the I/O pad near the chip corner. 2019-08-16 00:40:49 +02:00
unittests Compatiblilty with boost 1.57 on RedHat 6. 2019-03-11 16:01:11 +01:00
vlsisapd Various typos correction (courtesy of G. Gouvine). 2019-07-30 13:13:57 +02:00
.gitignore Various bug corrections to pass the alliance-check-toolkit reference benchs. 2019-05-24 23:57:22 +02:00
Makefile Enabling the user to choose the devtoolset it needs. 2019-03-04 14:20:13 +01:00
README.rst Various typos correction (courtesy of G. Gouvine). 2019-07-30 13:13:57 +02:00

README.rst

.. -*- Mode: rst -*-


===============
Coriolis README
===============

Coriolis is a free database, placement tool and routing tool for VLSI design.


Purpose
=======

Coriolis provides several tools to perform the layout of VLSI circuits.  Its
main components are the Hurricane database, the Etesian placer and the Katana
router, but other tools can use the Hurricane database and the parsers
provided.

The user interface <cgt> is the prefered way to use Coriolis, but all
Coriolis tools are Python modules and thus scriptable.


Documentation
=============

The complete documentation is available here, both in pdf & html:

   ./documentation/_build/html/index.html
   ./documentation/UsersGuide/UsersGuide.pdf

The documentation of the latest *stable* version is also
available online. It may be quite outdated from the *devel*
version.

    https://www-soc.lip6.fr/sesi-docs/coriolis2-docs/coriolis2/en/latex/users-guide/UsersGuide.pdf


Building Coriolis
=================

To build Coriolis, ensure the following prerequisites are met:

* Python 2.7.
* cmake.
* boost.
* bison & flex.
* Qt 4 or 5.
* libxml2.
* RapidJSON
* A C++11 compliant compiler.

The build system relies on a fixed directory tree from the root
of the user currently building it. Thus first step is to get a clone of
the repository in the right place. Proceed as follow: ::

   ego@home:~$ mkdir -p ~/coriolis-2.x/src/support
   ego@home:~$ cd ~/coriolis-2.x/src/support
   ego@home:~$ git clone http://github.com/miloyip/rapidjson
   ego@home:~$ git checkout ec322005072076ef53984462fb4a1075c27c7dfd
   ego@home:~$ cd ~/coriolis-2.x/src
   ego@home:src$ git clone https://www-soc.lip6.fr/git/coriolis.git
   ego@home:src$ cd coriolis

If you want to use the *devel* branch: ::

    ego@home:coriolis$ git checkout devel

Then, build the tool: ::

    ego@home:coriolis$ make install

Coriolis gets installed at the root of the following tree: ::

    ~/coriolis-2.x/<OS>.<DISTRIB>/Release.Shared/install/

Where ``<OS>`` is the name of your operating system and ``<DISTRIB>`` your
distribution.


Using Coriolis
==============

The Coriolis main interface can be launched with the command: ::

    ego@home:~: ~/coriolis-2.x/<OS>.<DISTRIB>/Release.Shared/install/bin/coriolis

The ``coriolis`` script detects its location and setups the UNIX
environment appropriately, then lauches ``cgt`` (or *any* command, with the
``--run=<COMMAND>`` option).

Conversely, you can setup the current shell environement for Coriolis by 
using the helper ``coriolisEnv.py``, then run any Coriolis tool: ::

    ego@home:~$ eval `~/coriolis-2.x/src/coriolis/bootstrap/coriolisEnv.py`
    ego@home:~$ cgt -V