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Full update of the generated documentation for version 2.3

This commit is contained in:
Jean-Paul Chaput 2019-05-27 18:49:51 +02:00
parent 9db39a7b5e
commit 0df4821806
1047 changed files with 8781 additions and 4363 deletions
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crlcore/doc/crlcore/html/classCRL_1_1RoutingLayerGauge-members.html
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@ -62,16 +62,15 @@ $(function() {
<tr class="even"><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#a94c216b22d35e8cb6a91a9597ba592ce">getPitch</a>() const</td><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html">CRL::RoutingLayerGauge</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
<tr><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#ad61cdf130c8b739bb44a01cfd5968022">getTrackIndex</a>(DbU::Unit start, DbU::Unit stop, DbU::Unit position, unsigned mode) const</td><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html">CRL::RoutingLayerGauge</a></td><td class="entry"></td></tr>
<tr class="even"><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#ab9bbb7959ca58438d59709398044daae">getTrackNumber</a>(DbU::Unit start, DbU::Unit stop) const</td><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html">CRL::RoutingLayerGauge</a></td><td class="entry"></td></tr>
<tr><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#a470828019c5cde566e7aa6d27ef68439">getTrackPosition</a>(DbU::Unit start, unsigned depth) const</td><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html">CRL::RoutingLayerGauge</a></td><td class="entry"></td></tr>
<tr class="even"><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#ab0e0d9e98b9a75312433a39aef247950">getType</a>() const</td><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html">CRL::RoutingLayerGauge</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
<tr><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#ac0783d29a7f9f6a2f02ac72f3196d637">getViaWidth</a>() const</td><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html">CRL::RoutingLayerGauge</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
<tr class="even"><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#ab29fa7895f4fe661eb85bed9f6a5860e">getWireWidth</a>() const</td><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html">CRL::RoutingLayerGauge</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
<tr><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#ab0e0d9e98b9a75312433a39aef247950">getType</a>() const</td><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html">CRL::RoutingLayerGauge</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
<tr class="even"><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#ac0783d29a7f9f6a2f02ac72f3196d637">getViaWidth</a>() const</td><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html">CRL::RoutingLayerGauge</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
<tr><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#ab29fa7895f4fe661eb85bed9f6a5860e">getWireWidth</a>() const</td><td class="entry"><a class="el" href="classCRL_1_1RoutingLayerGauge.html">CRL::RoutingLayerGauge</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
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<tr class="separator:ab8d5ae22c453605226b2695c2568c4f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab9bbb7959ca58438d59709398044daae"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#ab9bbb7959ca58438d59709398044daae">getTrackNumber</a> (<a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a> start, <a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a> stop) const</td></tr>
<tr class="separator:ab9bbb7959ca58438d59709398044daae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad61cdf130c8b739bb44a01cfd5968022"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#ad61cdf130c8b739bb44a01cfd5968022">getTrackIndex</a> (<a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a> start, <a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a> stop, <a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a> position, unsigned mode) const</td></tr>
<tr class="memitem:ad61cdf130c8b739bb44a01cfd5968022"><td class="memItemLeft" align="right" valign="top">long&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#ad61cdf130c8b739bb44a01cfd5968022">getTrackIndex</a> (<a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a> start, <a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a> stop, <a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a> position, unsigned mode) const</td></tr>
<tr class="separator:ad61cdf130c8b739bb44a01cfd5968022"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a470828019c5cde566e7aa6d27ef68439"><td class="memItemLeft" align="right" valign="top"><a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classCRL_1_1RoutingLayerGauge.html#a470828019c5cde566e7aa6d27ef68439">getTrackPosition</a> (<a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a> start, unsigned depth) const</td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-static-methods"></a>
Static Public Member Functions</h2></td></tr>
@ -673,35 +671,6 @@ Static Public Member Functions</h2></td></tr>
</div><div class="memdoc">
<p><b>Returns:</b> the index of the track nearest position <code>position</code> in interval <code>[start:stop]</code>, according the rounding <code>mode</code>. </p>
</div>
</div>
<a id="a470828019c5cde566e7aa6d27ef68439"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a470828019c5cde566e7aa6d27ef68439">&#9670;&nbsp;</a></span>getTrackPosition()</h2>
<div class="memitem">
<div class="memproto">
<table class="memname">
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<td class="memname"><a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a> CRL::RoutingLayerGauge::getTrackPosition </td>
<td>(</td>
<td class="paramtype"><a class="elRef" doxygen="/dsk/l1/jpc/coriolis-2.x/src/coriolis/hurricane/doc/hurricane/html/hurricane.tag:../hurricane/" href="../hurricane/group__DbUGroup.html#ga4fbfa3e8c89347af76c9628ea06c4146">DbU::Unit</a>&#160;</td>
<td class="paramname"><em>start</em>, </td>
</tr>
<tr>
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<td></td>
<td class="paramtype">unsigned&#160;</td>
<td class="paramname"><em>depth</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td> const</td>
</tr>
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</div><div class="memdoc">
<p><b>Returns:</b> the position of the track number <code>depth</code> (with first track at <code>start</code>). </p>
</div>
</div>
<hr/>The documentation for this class was generated from the following files:<ul>
@ -713,7 +682,7 @@ Static Public Member Functions</h2></td></tr>
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<arglist>(DbU::Unit start, DbU::Unit stop) const</arglist>
</member>
<member kind="function">
<type>unsigned int</type>
<type>long</type>
<name>getTrackIndex</name>
<anchorfile>classCRL_1_1RoutingLayerGauge.html</anchorfile>
<anchor>ad61cdf130c8b739bb44a01cfd5968022</anchor>
<arglist>(DbU::Unit start, DbU::Unit stop, DbU::Unit position, unsigned mode) const</arglist>
</member>
<member kind="function">
<type>DbU::Unit</type>
<name>getTrackPosition</name>
<anchorfile>classCRL_1_1RoutingLayerGauge.html</anchorfile>
<anchor>a470828019c5cde566e7aa6d27ef68439</anchor>
<arglist>(DbU::Unit start, unsigned depth) const</arglist>
</member>
<member kind="function" static="yes">
<type>static RoutingLayerGauge *</type>
<name>create</name>

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<li>getTrackNumber()
: <a class="el" href="classCRL_1_1RoutingLayerGauge.html#ab9bbb7959ca58438d59709398044daae">CRL::RoutingLayerGauge</a>
</li>
<li>getTrackPosition()
: <a class="el" href="classCRL_1_1RoutingLayerGauge.html#a470828019c5cde566e7aa6d27ef68439">CRL::RoutingLayerGauge</a>
</li>
<li>getType()
: <a class="el" href="classCRL_1_1RoutingLayerGauge.html#ab0e0d9e98b9a75312433a39aef247950">CRL::RoutingLayerGauge</a>
</li>
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<li>getTrackNumber()
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</li>
<li>getTrackPosition()
: <a class="el" href="classCRL_1_1RoutingLayerGauge.html#a470828019c5cde566e7aa6d27ef68439">CRL::RoutingLayerGauge</a>
</li>
<li>getType()
: <a class="el" href="classCRL_1_1RoutingLayerGauge.html#ab0e0d9e98b9a75312433a39aef247950">CRL::RoutingLayerGauge</a>
</li>
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@ -149,7 +149,7 @@ Enumerations</h2></td></tr>
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12
crlcore/doc/crlcore/latex/classCRL_1_1RoutingLayerGauge.tex
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@ -40,9 +40,7 @@ void \mbox{\hyperlink{classCRL_1_1RoutingLayerGauge_ab8d5ae22c453605226b2695c256
\item
unsigned int \mbox{\hyperlink{classCRL_1_1RoutingLayerGauge_ab9bbb7959ca58438d59709398044daae}{get\+Track\+Number}} (\textbf{ Db\+U\+::\+Unit} start, \textbf{ Db\+U\+::\+Unit} stop) const
\item
unsigned int \mbox{\hyperlink{classCRL_1_1RoutingLayerGauge_ad61cdf130c8b739bb44a01cfd5968022}{get\+Track\+Index}} (\textbf{ Db\+U\+::\+Unit} start, \textbf{ Db\+U\+::\+Unit} stop, \textbf{ Db\+U\+::\+Unit} position, unsigned mode) const
\item
\textbf{ Db\+U\+::\+Unit} \mbox{\hyperlink{classCRL_1_1RoutingLayerGauge_a470828019c5cde566e7aa6d27ef68439}{get\+Track\+Position}} (\textbf{ Db\+U\+::\+Unit} start, unsigned depth) const
long \mbox{\hyperlink{classCRL_1_1RoutingLayerGauge_ad61cdf130c8b739bb44a01cfd5968022}{get\+Track\+Index}} (\textbf{ Db\+U\+::\+Unit} start, \textbf{ Db\+U\+::\+Unit} stop, \textbf{ Db\+U\+::\+Unit} position, unsigned mode) const
\end{DoxyCompactItemize}
\subsection*{Static Public Member Functions}
\begin{DoxyCompactItemize}
@ -197,13 +195,7 @@ Referenced by C\+R\+L\+::\+Routing\+Gauge\+::get\+Layer\+Direction().
\subsubsection{\texorpdfstring{get\+Track\+Index()}{getTrackIndex()}}
{\footnotesize\ttfamily unsigned int C\+R\+L\+::\+Routing\+Layer\+Gauge\+::get\+Track\+Index (\begin{DoxyParamCaption}\item[{\textbf{ Db\+U\+::\+Unit}}]{start, }\item[{\textbf{ Db\+U\+::\+Unit}}]{stop, }\item[{\textbf{ Db\+U\+::\+Unit}}]{position, }\item[{unsigned}]{mode }\end{DoxyParamCaption}) const}
{\bfseries Returns\+:} the index of the track nearest position {\ttfamily position} in interval {\ttfamily \mbox{[}start\+:stop\mbox{]}}, according the rounding {\ttfamily mode}. \mbox{\Hypertarget{classCRL_1_1RoutingLayerGauge_a470828019c5cde566e7aa6d27ef68439}\label{classCRL_1_1RoutingLayerGauge_a470828019c5cde566e7aa6d27ef68439}}
\index{C\+R\+L\+::\+Routing\+Layer\+Gauge@{C\+R\+L\+::\+Routing\+Layer\+Gauge}!get\+Track\+Position@{get\+Track\+Position}}
\index{get\+Track\+Position@{get\+Track\+Position}!C\+R\+L\+::\+Routing\+Layer\+Gauge@{C\+R\+L\+::\+Routing\+Layer\+Gauge}}
\subsubsection{\texorpdfstring{get\+Track\+Position()}{getTrackPosition()}}
{\footnotesize\ttfamily \textbf{ Db\+U\+::\+Unit} C\+R\+L\+::\+Routing\+Layer\+Gauge\+::get\+Track\+Position (\begin{DoxyParamCaption}\item[{\textbf{ Db\+U\+::\+Unit}}]{start, }\item[{unsigned}]{depth }\end{DoxyParamCaption}) const}
{\bfseries Returns\+:} the position of the track number {\ttfamily depth} (with first track at {\ttfamily start}).
{\bfseries Returns\+:} the index of the track nearest position {\ttfamily position} in interval {\ttfamily \mbox{[}start\+:stop\mbox{]}}, according the rounding {\ttfamily mode}.
The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize}
\item

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\vspace*{1cm}
{\large Generated by Doxygen 1.8.14}\\
\vspace*{0.5cm}
{\small Thu Oct 18 2018 16:33:48}\\
{\small Sun May 26 2019 17:26:53}\\
\end{center}
\end{titlepage}

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crlcore/etc/symbolic/cmos/plugins.conf
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@ -14,11 +14,6 @@ parametersTable = \
, ("chip.block.rails.vWidth" , TypeInt , l(12) )
, ("chip.block.rails.hSpacing" , TypeInt , l(6) )
, ("chip.block.rails.vSpacing" , TypeInt , l(6) )
, ('chip.pad.pck' , TypeString, 'pck_px')
, ('chip.pad.pvddick' , TypeString, 'pvddick_px')
, ('chip.pad.pvssick' , TypeString, 'pvssick_px')
, ('chip.pad.pvddeck' , TypeString, 'pvddeck_px')
, ('chip.pad.pvsseck' , TypeString, 'pvsseck_px')
, ('clockTree.minimumSide' , TypeInt , l(600))
, ('clockTree.buffer' , TypeString, 'buf_x2')
, ('clockTree.placerEngine' , TypeString, 'Etesian')

11
documentation/CMakeLists.txt
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@ -46,10 +46,14 @@
set ( usersGuideRst UsersGuide/pdfHeader.rst
UsersGuide/LicenseCredits.rst
UsersGuide/Releases.rst
UsersGuide/DesignFlow.rst
UsersGuide/Installation.rst
UsersGuide/Configuration.rst
UsersGuide/ViewerTools.rst
UsersGuide/ScriptsPlugins.rst )
set ( confTechnoRst ConfigurationTechnology/pdfHeader.rst
ConfigurationTechnology/Architecture.rst )
set ( rdsRst RDS/pdfHeader.rst
RDS/RDSpage.rst )
@ -109,6 +113,13 @@
etc/SoC-ReST.tex
${pythonCppRst} )
# add_custom_target ( pdf_ConfTechno ALL
# cd ${DOCUMENTATION_SOURCE_DIR}/ConfigurationTechnology
# && ../etc/doPdf.sh ${confTechnoRst} ConfigurationTechnology.rst
# DEPENDS etc/definitions.rst
# etc/SoC-ReST.tex
# ${confTechnoRst} )
add_custom_target ( pdf_RDS ALL
cd ${DOCUMENTATION_SOURCE_DIR}/RDS
&& ../etc/doPdf.sh ${rdsRst} RDS.rst

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documentation/PythonTutorial/pdfHeader.rst
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@ -13,44 +13,31 @@
\begin{center}
\begin{figure}[t]
\begin{center}
\includegraphics[scale=0.4]{../etc/images/logoLIP6_SU_CNRS.pdf}
\end{center}
\end{figure}
\hfill \includegraphics[height=2.0cm]{../etc/images/Logo-LIP6-bleugris}
\hfill \includegraphics[height=1.8cm]{../etc/images/Logo-SU}
\hfill \includegraphics[height=2.0cm]{../etc/images/Logo-CNRS}
\hfill
\\*[2cm]
\vspace{2cm}
\huge \textsc{Sorbonne Université}
\huge \textsc{Sorbonne Université} \\*[1cm]
\vspace{1cm}
\huge {\textsc{lip6} Laboratory}
\vspace{3cm}
\huge {\textsc{lip6} Laboratory} \\*[3cm]
\Huge \textsc{Hurricane+Python}
\vspace{1cm}
\Huge \textbf{\textsc{Hurricane+Python Tutorial}} \\*[1cm]
\Huge \textbf{Tutorial}
\vspace{1cm}
\huge {Jean-Paul \textsc{Chaput}} \\
\Large\href{mailto:Jean-Paul.Chaput@lip6.fr}{Jean-Paul.Chaput@lip6.fr}\\*[4cm]
\huge {Jean-Paul \textsc{Chaput}}
\vspace{4cm}
\begin{figure}[!h]
\begin{center}
\includegraphics[scale=1.0]{../etc/images/logoCC.pdf}
\end{center}
\end{figure}
\normalsize
This work is licensed under a\\
Creative Commons Attribution-NonCommercial-ShareALike 4.0 International License.\\
Creative Commons License \href{https://creativecommons.org/licenses/by-nc-sa/4.0/} {creativecommons.org/licenses/by-nc-sa/4.0/}
\normalsize
This work is licensed under a \\
Creative Commons Attribution-NonCommercial-ShareALike 4.0 International License. \\
Creative Commons License \href{https://creativecommons.org/licenses/by-nc-sa/4.0/}{creativecommons.org/licenses/by-nc-sa/4.0/}
\end{center}
\newpage
\pagestyle{fancy}

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66
documentation/UsersGuide/Installation.rst
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@ -31,6 +31,7 @@ Main building prerequisites:
* bzip2
* yacc & lex
* Qt 4 or Qt 5
* PyQt 4 or PyQt 5
* Qwt
Building documentation prerequisites:
@ -104,10 +105,25 @@ Building Coriolis
The actively developed branch
-----------------------------
For an intermediary period, the branch under active development you must use is
**devel_anabatic** ::
The **devel_anabatic** branch is now closed and we go back to a more classical
scheme where **master** is the stable version and **devel** the development one.
dummy@lepka:coriolis> git checkout devel_anabatic
The |Coriolis| |git| repository is https://www-soc.lip6.fr/git/coriolis.git
.. note::
Again, the **devel_anabatic** branch is now closed. Please revert to **devel**
or **master**.
.. note::
As it is now possible to mix |PyQt| widget with |Coriolis| ones, it is simpler
for us to revert to |Qt| 4 only. Our reference |OS| being |RHEL| 7, there is no
compatible |PyQt5| build compatible with their |Qt| 5 version (we fall short of
one minor, they provides |Qt| 5.9 were we need at least |Qt| 5.10).
.. note::
Under |RHEL| 7 or clones, they upgraded their version of |Qt| 4 (from 4.6 to 4.8)
so the *diagonal line* bug no longer occur. So we can safely use the default
system |Qt| again.
Installing on |RedHat| or compatible distributions
@ -120,16 +136,10 @@ Installing on |RedHat| or compatible distributions
boost-devel boost-python boost-filesystem \
boost-regex boost-wave \
python-devel libxml2-devel bzip2-devel \
qt5-qtbase-devel qt5-qtsvg-devel # Qt 5.
The package ``qwt-qt5-devel`` and it's dependency ``qwt-qt5`` are not provided
by any standard repository (like |EPEL|). You may download them from the
`LIP6 Addons Repository <https://ftp.lip6.fr/pub/linux/distributions/slsoc/soc/7/addons/x86_64/repoview/letter_q.group.html>`_
Then run: ::
dummy@lepka:~> yum localinstall -y qwt-qt5-6.1.2-4.fc23.x86_64.rpm \
qwt-qt5-6.1.2-4.fc23.x86_64.rpm # Qwt for Qt 5.
qt-devel qwt-devel # Qt 4
Note, that the ``Qwt`` packages are directly availables from the standart distribution
when using |Qt| 4.
2. Install the unpackaged prerequisites. Currently, only RapidJSON_. ::
@ -150,7 +160,6 @@ Installing on |RedHat| or compatible distributions
dummy@lepka:coriolis> git checkout devel_anabatic
dummy@lepka:coriolis> ./bootstrap/ccb.py --project=support \
--project=coriolis \
--qt5 \
--make="-j4 install"
.. note::
@ -171,21 +180,26 @@ be given as argument: ::
dummy@lepka:coriolis> ./bootstrap/ccb.py --project=coriolis \
--devtoolset=8 --make="-j4 install"
If you want to uses Qt 4 instead of Qt 5 modify the previous steps as follow:
If you want to uses Qt 5 instead of Qt 4 modify the previous steps as follow:
* At **step 1**, do not install the |QT| 5 related development packages (``qt5-qtbase-devel``
and ``qt5-qtsvg-devel``), but instead: ::
* At **step 1**, do not install the |QT| 4 related development package (``qt4-devel``),
but instead: ::
dummy@lepka:~> yum install -y git qt-devel qwt-devel # Qt 4
dummy@lepka:~> yum install -y qt5-qtbase-devel qt5-qtsvg-devel # Qt 5.
The package ``qwt-qt5-devel`` and it's dependency ``qwt-qt5`` are not provided
by any standard repository (like |EPEL|). You may download them from the
`LIP6 Addons Repository <https://ftp.lip6.fr/pub/linux/distributions/slsoc/soc/7/addons/x86_64/repoview/letter_q.group.html>`_
Then run: ::
dummy@lepka:~> yum localinstall -y qwt-qt5-6.1.2-4.fc23.x86_64.rpm \
qwt-qt5-6.1.2-4.fc23.x86_64.rpm # Qwt for Qt 5.
Note, that the ``Qwt`` packages are directly availables from the standart distribution
when using |Qt| 4.
* At **step 4**, add a ``--qt5`` argument to the ``ccb.py`` command line.
* At **step 4**, remove the ``--qt5`` arguments to the ``ccb.py`` command line.
Be aware that, under |RHEL| 7 or clones, there is a bug in |Qt| 4 that makes diagonal
lines appears whenever a filled rectangle is not fully included in the displayed area.
This may be misleading when visualising a layout...
* The |Python| scripts that makes uses of |PyQt| in ``crlcore`` and ``cumulus`` must be
edited to import ``PyQt5`` instead of ``PtQt4`` (should find a way to automatically
switch between the two of them).
The complete list of |ccb| functionalities can be accessed with the ``--help`` argument.
It also may be run in graphical mode (``--gui``).
@ -203,7 +217,6 @@ Run again ``ccb.py``, adding the ``--debug`` argument: ::
dummy@lepka:coriolis> ./bootstrap/ccb.py --project=support \
--project=coriolis \
--qt5 \
--make="-j4 install" --debug
@ -259,7 +272,6 @@ Third and final step, build & install: ::
dummy@lepka:src> cd coriolis
dummy@lepka:coriolis> git checkout devel_anabatic
dummy@lepka:coriolis> ./bootstrap/ccb.py --project=coriolis \
--qt5 \
--make="-j4 install"

18
documentation/UsersGuide/LicenseCredits.rst
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@ -18,10 +18,10 @@ Credits & License
<p class="credit"><span class="left"><span class="sc">Stratus</span></span>
<span class="right">Sophie <span class="sc">Belloeil</span></span></p>
<br>
<p class="credit"><span class="left"><span class="sc">Knik</span></span>
<p class="credit"><span class="left"><span class="sc">Katana</span> (global)</span>
<span class="right">Damien <span class="sc">Dupuis</span></span></p>
<br>
<p class="credit"><span class="left"><span class="sc">Kite</span>,
<p class="credit"><span class="left"><span class="sc">Katana</span> (detailed),
<span class="sc">Unicorn</span></span></span>
<span class="right">Jean-Paul <span class="sc">Chaput</span></span></p>
<br>
@ -30,13 +30,13 @@ Credits & License
.. raw:: latex
\begin{center}\begin{minipage}[t]{.8\textwidth}
\noindent\DUrole{sc}{Hurricane} \dotfill Rémy \DUrole{sc}{Escassut} \&
Christian \DUrole{sc}{Masson} \\
\noindent\DUrole{sc}{Etesian} \dotfill Gabriel \DUrole{sc}{Gouvine} \\
\noindent\DUrole{sc}{Stratus} \dotfill Sophie \DUrole{sc}{Belloeil} \\
\noindent\DUrole{sc}{Knik} \dotfill Damien \DUrole{sc}{Dupuis} \\
\noindent\DUrole{sc}{Kite},
\DUrole{sc}{Unicorn} \dotfill Jean-Paul \DUrole{sc}{Chaput} \\
\noindent\DUrole{sc}{Hurricane} \dotfill Rémy \DUrole{sc}{Escassut} \&
Christian \DUrole{sc}{Masson} \\
\noindent\DUrole{sc}{Etesian} \dotfill Gabriel \DUrole{sc}{Gouvine} \\
\noindent\DUrole{sc}{Stratus} \dotfill Sophie \DUrole{sc}{Belloeil} \\
\noindent\DUrole{sc}{Katana} (global) \dotfill Damien \DUrole{sc}{Dupuis} \\
\noindent\DUrole{sc}{Katana} (detailed),
\DUrole{sc}{Unicorn} \dotfill Jean-Paul \DUrole{sc}{Chaput} \\
\end{minipage}\end{center}

26
documentation/UsersGuide/Releases.rst
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@ -94,9 +94,31 @@ Release v2.1
.. as possible.
**Release v2.2**
~~~~~~~~~~~~~~~~
Release v2.2
~~~~~~~~~~~~
#. Added JSON import/export of the whole Hurricane DataBase. Two save mode
are supported: *Cell* mode (standalone) or *Blob* mode, which dump the
whole design down and including the standard cells.
Release v2.3
~~~~~~~~~~~~
#. Revert to a more standard organisation of the branchs. **devel_anabatic** is
closed and we go on with **master** (stable version) and **devel**.
#. Make |Katana| the default global & detailed router. Put |Knik| & |Kite| in the
obsolete menues.
#. Finally make uses of |PyQt4| widgets. Seems to integrate without problems
with the |Coriolis| own |Qt| widget. The drawback is that to build against |Qt| 5
needs to adjustement from the user.
#. Improved support for whole chip management. The outer part of the chip containing
the pad is decoupled from the core. This allow to cleanly separate real pads from
the foundry from a symbolic core. But this does not preclude other combinations
as fully symbolic or fully real.
To perform the separation an intermediate hierarchical level ``corona`` between chip
and core has been introduced.

117
documentation/UsersGuide/ScriptsPlugins.rst
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@ -13,6 +13,9 @@
.. _Python Interface to Coriolis:
|newpage|
Python Interface for |Hurricane| / |Coriolis|
=============================================
@ -100,35 +103,52 @@ Chip Placement
Automatically perform the placement of a complete chip. This plugin, as well
as the other P&R tools expect a specific top-level hierarchy for the design.
The top-level hierarchy must contains the instances of all the I/O pads and
**exactly one** instance of the chip's core model.
**exactly one** instance named ``corona`` of an eponym cell ``corona``.
The ``corona`` cell in turn containing the instance of the chip's core model.
The intermediate ``corona`` hierarchical level has been introduced to handle
the possible discoupling between real I/O pads supplied by a foundry and a
symbolic core. So the *chip* level contains only real layout and the corona
and below only symbolic layer.
.. note:: This do not prevent having a design either fully symbolic (pads and core)
or fully real.
.. note:: The ``corona`` also avoid the router to actually have to manage directly
the pads which simplificate it's configuration and accessorily avoid
to have the pads stuffed with blockages.
|bcenter| |ChipStructure-1| |ecenter|
The designer must provide a configuration file that defines the rules for the
placement of the top-level hierarchy (that is, the pads and the core).
This file must be named after the chip's name, by appending ``_chip.py``
This file must be named after the chip's name, by appending ``_ioring.py``
(obviously, it is a |Python| file). For instance if the chip netlist file
is called ``amd2901_crl.vst``, then the configuration file must be named
``amd2901_crl_chip.vst``.
is called ``amd2901.vst``, then the configuration file must be named
``amd2901_ioring.vst``.
Example of chip placement configuration file (for ``AM2901``): ::
from helpers import l, u, n
chip = \
{ 'pads.south' : [ 'p_a3' , 'p_a2' , 'p_a1' , 'p_r0'
, 'p_vddick0', 'p_vssick0', 'p_a0' , 'p_i6'
, 'p_i8' , 'p_i7' , 'p_r3' ]
, 'pads.east' : [ 'p_zero' , 'p_i0' , 'p_i1' , 'p_i2'
, 'p_vddeck0', 'p_vsseck0', 'p_q3' , 'p_b0'
, 'p_b1' , 'p_b2' , 'p_b3' ]
, 'pads.north' : [ 'p_noe' , 'p_y3' , 'p_y2' , 'p_y1'
, 'p_y0' , 'p_vddeck1', 'p_vsseck1', 'p_np'
, 'p_ovr' , 'p_cout' , 'p_ng' ]
, 'pads.west' : [ 'p_cin' , 'p_i4' , 'p_i5' , 'p_i3'
, 'p_ck' , 'p_d0' , 'p_d1' , 'p_d2'
, 'p_d3' , 'p_q0' , 'p_f3' ]
, 'core.size' : ( 1500, 1500 )
, 'chip.size' : ( 3000, 3000 )
, 'chip.clockTree' : True
{ 'pads.ioPadGauge' : 'pxlib'
, 'pads.south' : [ 'p_a3' , 'p_a2' , 'p_a1' , 'p_r0'
, 'p_vddick0', 'p_vssick0', 'p_a0' , 'p_i6'
, 'p_i8' , 'p_i7' , 'p_r3' ]
, 'pads.east' : [ 'p_zero' , 'p_i0' , 'p_i1' , 'p_i2'
, 'p_vddeck0', 'p_vsseck0', 'p_q3' , 'p_b0'
, 'p_b1' , 'p_b2' , 'p_b3' ]
, 'pads.north' : [ 'p_noe' , 'p_y3' , 'p_y2' , 'p_y1'
, 'p_y0' , 'p_vddeck1', 'p_vsseck1', 'p_np'
, 'p_ovr' , 'p_cout' , 'p_ng' ]
, 'pads.west' : [ 'p_cin' , 'p_i4' , 'p_i5' , 'p_i3'
, 'p_ck' , 'p_d0' , 'p_d1' , 'p_d2'
, 'p_d3' , 'p_q0' , 'p_f3' ]
, 'core.size' : ( l(1500), l(1500) )
, 'chip.size' : ( l(3000), l(3000) )
, 'chip.clockTree' : True
}
The file must contain *one dictionnary* named ``chip``.
@ -138,6 +158,10 @@ The file must contain *one dictionnary* named ``chip``.
+----------------------+-------------------------------------------------------+
| Parameter Key/Name | Value/Contents type |
+======================+=======================================================+
| ``'pad.ioPadGauge'`` | The routing gauge to use for the pad. Must be given |
| | as it differs from the one used to route standard |
| | inside the core |
+----------------------+-------------------------------------------------------+
| ``'pad.south'`` | Ordered list (left to right) of pad instances names |
| | to put on the south side of the chip |
+----------------------+-------------------------------------------------------+
@ -173,53 +197,24 @@ Configuration parameters, defaults are defined in ``etc/coriolis2/<STECHNO>/plug
| | One rail for the clock and at least two pairs |
| | of power/grounds |
+-----------------------------------+------------------+----------------------------+
|``chip.block.rails.hWidth`` | TypeInt | :cb:`12` |
|``chip.block.rails.hWidth`` | TypeInt | :cb:`12` |lambda| |
| +------------------+----------------------------+
| | The horizontal with of the rails |
+-----------------------------------+------------------+----------------------------+
|``chip.block.rails.vWidth`` | TypeInt | :cb:`12` |
|``chip.block.rails.vWidth`` | TypeInt | :cb:`12` |lambda| |
| +------------------+----------------------------+
| | The vertical with of the rails |
+-----------------------------------+------------------+----------------------------+
|``chip.block.rails.hSpacing`` | TypeInt | :cb:`6` |
|``chip.block.rails.hSpacing`` | TypeInt | :cb:`6` |lambda| |
| +------------------+----------------------------+
| | The spacing, *edge to edge* of two adjacent |
| | horizontal rails |
+-----------------------------------+------------------+----------------------------+
|``chip.block.rails.vSpacing`` | TypeInt | :cb:`6` |
|``chip.block.rails.vSpacing`` | TypeInt | :cb:`6` |lambda| |
| +------------------+----------------------------+
| | The spacing, *edge to edge* of two adjacent |
| | vertical rails |
+-----------------------------------+------------------+----------------------------+
|``chip.pad.pck`` | TypeString | :cb:`pck_px` |
| +------------------+----------------------------+
| | The model name of the pad connected to the |
| | chip external clock |
+-----------------------------------+------------------+----------------------------+
|``chip.pad.pvddeck`` | TypeString | :cb:`pvddeck_px` |
| +------------------+----------------------------+
| | The model name of the pad connected to the |
| | ``vdde`` (external power) and suppling it to |
| | the core |
+-----------------------------------+------------------+----------------------------+
|``chip.pad.pvsseck`` | TypeString | :cb:`pvsseck_px` |
| +------------------+----------------------------+
| | The model name of the pad connected to the |
| | ``vsse`` (external ground) and suppling it to |
| | the core |
+-----------------------------------+------------------+----------------------------+
|``chip.pad.pvddick`` | TypeString | :cb:`pvddick_px` |
| +------------------+----------------------------+
| | The model name of the pad connected to the |
| | ``vddi`` (internal power) and suppling it to |
| | the core |
+-----------------------------------+------------------+----------------------------+
|``chip.pad.pvssick`` | TypeString | :cb:`pvssick_px` |
| +------------------+----------------------------+
| | The model name of the pad connected to the |
| | ``vssi`` (internal ground) and suppling it to |
| | the core |
+-----------------------------------+------------------+----------------------------+
.. note::
If no clock tree is generated, then the clock rail is *not* created.
@ -267,13 +262,13 @@ Netlist reorganisation:
contain DFFs that get re-connected to the clock sub-nets (from the
top level). Changes both the model netlist and interface to propagate
the relevant clock sub-nets to the instanciated model. The new model
with the added clock signal is renamed with a ``_clocked`` suffix.
For example, the sub-block model ``ram.vst`` will become ``ram_clocked.vst``.
with the added clock signal is renamed with a ``_cts`` suffix.
For example, the sub-block model ``ram.vst`` will become ``ram_cts.vst``.
.. note::
If you are to re-run the clock tree plugin on a netlist, be careful
to erase any previously generated ``_clocked`` file (both netlist and
layout: ``rm *.clocked.{ap,vst}``). And restart |cgt| to clear its
to erase any previously generated ``_cts`` file (both netlist and
layout: ``rm *_cts.{ap,vst}``). And restart |cgt| to clear its
memory cache.
Configuration parameters, defaults are defined in ``etc/coriolis2/<STECHNO>/plugins.conf``.
@ -283,7 +278,7 @@ Configuration parameters, defaults are defined in ``etc/coriolis2/<STECHNO>/plug
+===================================+==================+============================+
| **ClockTree Plugin Parameters** |
+-----------------------------------+------------------+----------------------------+
|``clockTree.minimumSide`` | TypeInt | :cb:`300` |
|``clockTree.minimumSide`` | TypeInt | :cb:`300` |lambda| |
| +------------------+----------------------------+
| | The minimum size below which the clock tree |
| | will stop to perform quadri-partitions |
@ -292,12 +287,6 @@ Configuration parameters, defaults are defined in ``etc/coriolis2/<STECHNO>/plug
| +------------------+----------------------------+
| | The buffer model to use to drive sub-nets |
+-----------------------------------+------------------+----------------------------+
|``clockTree.placerEngine`` | TypeString | :cb:`Etesian` |
| +------------------+----------------------------+
| | The placer to use. Other value is ``Mauka`` |
| | the simulated annealing placer which will go |
| | into retirement very soon |
+-----------------------------------+------------------+----------------------------+
Recursive-Save (RSave)
@ -329,4 +318,4 @@ You can generate the chip using one of the following method:
.. note::
Between two consecutive run, be sure to erase the netlist/layout generateds: ::
dummy@lepka:AM2901> rm *clocked*.vst *.ap
dummy@lepka:AM2901> rm *_cts*.vst *.ap

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@ -185,10 +185,9 @@ The |Etesian| placer is a state of the art (as of 2015) analytical placer. It is
within ``5%`` of other placers' solutions, but is normally a bit worse than ePlace.
This |Coriolis| tool is actually an encapsulation of |Coloquinte| which *is* the placer.
.. note:: *Instance Uniquification Unsupported:* a same logical instance cannot have
two different placements. So, either you manually make a clone of it or you
supply a placement for it. We need to implement uniquification in the
|Hurricane| database.
.. note:: *Instance Uniquification:* a same logical instance cannot have
two different placements. So, if you don't supply a placement for it, it will be
uniquified (cloned) and you will see the copy files appears on disk upon saving.
|noindent|
@ -280,56 +279,47 @@ Etesian Configuration Parameters
|newpage|
Knik -- Global Router
---------------------
The quality of |Knik| global routing solutions are equivalent to those of FGR_ 1.0.
For an in-depth description of |Knik| algorithms, you may download the thesis of
D. |Dupuis| avalaible from here~: `Knik Thesis`_.
The global router is (not yet) deterministic. To circumvent this limitation,
a global routing *solution* can be saved to disk and reloaded for later uses.
A global routing is saved into a file with the same name as the design and a
|kgr| extention. It is in `Box Router`_ output format.
|noindent| Menus:
* :math:`\textbf{P\&R} \rightarrow \textbf{Step by Step} \rightarrow \textbf{Save Global Routing}`
* :math:`\textbf{P\&R} \rightarrow \textbf{Step by Step} \rightarrow \textbf{Load Global Routing}`
Kite -- Detailed Router
Katana -- Global Router
-----------------------
|Kite| no longer suffers from the limitations of |Nero|. It can route big designs
The quality of |Katana| global routing solutions are equivalent to those of FGR_ 1.0.
For an in-depth description of |Katana| algorithms, you may download the thesis of
D. |Dupuis| avalaible from here~: `Knik Thesis`_ (|Knik| has been rewritten as part
of |Katana|, the algorithms remains essentially the same).
The global router is now deterministic.
Katana -- Detailed Router
-------------------------
|Katana| no longer suffers from the limitations of |Nero|. It can route big designs
as its runtime and memory footprint is almost linear (with respect to the number
of gates). It has successfully routed design of more than `150K` gates.
|medskip|
|noindent| However, this first release comes with the temporary the following
restrictions:
* Works only with |SxLib| standard cell gauge.
* Works always with 4 routing metal layers (`M2` through `M5`).
* Do not allow (take into account) pre-routed wires on signals
other than |POWER| or |GROUND|.
.. note::
**Slow Layer Assignment.** Most of the time, the layer assignment stage is
fast (less than a dozen seconds), but in some instances it can take more
than a dozen *minutes*. This is a known bug and will be corrected in later
releases.
After each run, |Kite| displays a set of *completion ratios* which must all
be equal to `100%` if the detailed routing has been successfull.
In the event of a failure, on a saturated design, you may decrease the
`edge saturation ratio` (argument `--edge`) to balance more evenly the design
saturation. That is, the maximum saturation decrease at the price of a wider
saturated area and increased wirelength. This is the saturation of the
*global* router |Knik|, and you may increase/decrease by steps of ``5%``,
which represent one track. The maximum capacity of the |SxLib| gauge is
10 tracks in two layers, that makes 20 tracks by |Knik| edge.
After each run, |Katana| displays a set of *completion ratios* which must all
be equal to `100%` or (``NNNN+0``) if the detailed routing has been successfull.
In the event of a failure, on a saturated design, you may tweak the three
following configuration parameters:
#. ``katana.hTrackReservedLocal``, the number of track reserved for local routing,
that quantity is substracted from the edge capacities (global routing) to
give a sense of the cluttering inside the GCells.
#. ``katana.vTrackReservedLocal``, same as above.
#. ``etesian.spaceMargin``, increase the free area of the overall design so the
routing density decrease.
The idea is to increase the horizontal and vertical local track reservation until
the detailed router succeed. But in doing so we make the task of the global router
more and more difficult as the capacity of the edges decrease, and at some point
it will fail too. So this is a balance.
Routing a design is done in four ordered steps:
@ -340,29 +330,26 @@ Routing a design is done in four ordered steps:
It is possible to supply to the router a complete wiring for some nets that the user's
wants to be routed according to a specific topology. The supplied topology must respect
the building rules of the |Katabatic| database (contacts must be, terminals, turns, h-tee
& v-tee only). During the first step :fboxtt:`Detailed Pre-Route` the router will solve
the building rules of the |Anabatic| database (contacts must be, *terminals*, *turns*, *h-tee*
& *v-tee* only). During the first step :fboxtt:`Detailed Pre-Route` the router will solve
overlaps between the segments, without making any dogleg. If no pre-routed topologies
are present, this step may be ommited. Any net routed at this step is then fixed and
become unmovable for the later stages.
After the detailed routing step the |Kite| data-structure is still active
After the detailed routing step the |Katana| data-structure is still active
(the Hurricane wiring is decorated). The finalize step performs the removal of
the |Kite| data-structure, and it is not advisable to save the design before
the |Katana| data-structure, and it is not advisable to save the design before
that step.
You may visualize the density (saturation) of either |Knik| (on edges) or
|Kite| (on GCells) until the routing is finalized. Special layers appears
You may visualize the density (saturation) of either the edges (global routing)
or the GCells (detailed routing) until the routing is finalized. Special layers appears
to that effect in the `The Layers&Go Tab`_.
Kite Configuration Parameters
.............................
Katana Configuration Parameters
...............................
As |Knik| is only called through |Kite|, it's parameters also have
the :cb:`kite.` prefix.
The |Katabatic| parameters control the layer assignment step.
The |Anabatic| parameters control the layer assignment step.
All the defaults value given below are from the default |Alliance| technology
(:cb:`cmos` and :cb:`SxLib` cell gauge/routing gauge).
@ -370,35 +357,35 @@ All the defaults value given below are from the default |Alliance| technology
+-----------------------------------+------------------+----------------------------+
| Parameter Identifier | Type | Default |
+===================================+==================+============================+
| **Katabatic Parameters** |
| **Anabatic Parameters** |
+-----------------------------------+------------------+----------------------------+
|``katabatic.topRoutingLayer`` | TypeString | :cb:`METAL5` |
|``anabatic.topRoutingLayer`` | TypeString | :cb:`METAL5` |
| +------------------+----------------------------+
| | Define the highest metal layer that will be |
| | used for routing (inclusive). |
+-----------------------------------+------------------+----------------------------+
|``katabatic.globalLengthThreshold``| TypeInt | :cb:`1450` |
|``anabatic.globalLengthThreshold`` | TypeInt | :cb:`1450` |
| +------------------+----------------------------+
| | This parameter is used by a layer assignment |
| | method which is no longer used (did not give |
| | good results) |
+-----------------------------------+------------------+----------------------------+
| ``katabatic.saturateRatio`` | TypePercentage | :cb:`80` |
| ``anabatic.saturateRatio`` | TypePercentage | :cb:`80` |
| +------------------+----------------------------+
| | If ``M(x)`` density is above this ratio, |
| | move up feedthru global segments up from |
| | depth ``x`` to ``x+2`` |
+-----------------------------------+------------------+----------------------------+
| ``katabatic.saturateRp`` | TypeInt | :cb:`8` |
| ``anabatic.saturateRp`` | TypeInt | :cb:`8` |
| +------------------+----------------------------+
| | If a GCell contains more terminals |
| | (:cb:`RoutingPad`) than that number, force a |
| | move up of the connecting segments to those |
| | in excess |
+-----------------------------------+------------------+----------------------------+
| **Knik Parameters** |
| **Katana Parameters** |
+-----------------------------------+------------------+----------------------------+
| ``kite.hTracksReservedLocal`` | TypeInt | :cb:`3` |
| ``katana.hTracksReservedLocal`` | TypeInt | :cb:`3` |
| +------------------+----------------------------+
| | To take account the tracks needed *inside* a |
| | GCell to build the *local* routing, decrease |
@ -407,40 +394,38 @@ All the defaults value given below are from the default |Alliance| technology
| | reserved capacity can be distinguished for |
| | more accuracy. |
+-----------------------------------+------------------+----------------------------+
| ``kite.vTracksReservedLocal`` | TypeInt | :cb:`3` |
| ``katana.vTracksReservedLocal`` | TypeInt | :cb:`3` |
| +------------------+----------------------------+
| | cf. ``kite.hTracksReservedLocal`` |
+-----------------------------------+------------------+----------------------------+
| **Kite Parameters** |
+-----------------------------------+------------------+----------------------------+
| ``kite.eventsLimit`` | TypeInt | :cb:`4000002` |
| ``katana.eventsLimit`` | TypeInt | :cb:`4000002` |
| +------------------+----------------------------+
| | The maximum number of segment displacements, |
| | this is a last ditch safety against infinite |
| | loop. It's perhaps a little too low for big |
| | designs |
+-----------------------------------+------------------+----------------------------+
| ``kite.ripupCost`` | TypeInt | :cb:`3` |
| ``katana.ripupCost`` | TypeInt | :cb:`3` |
| +------------------+----------------------------+
| | Differential introduced between two ripup |
| | cost to avoid a loop between two ripped up |
| | segments |
+-----------------------------------+------------------+----------------------------+
| ``kite.strapRipupLimit`` | TypeInt | :cb:`16` |
| ``katana.strapRipupLimit`` | TypeInt | :cb:`16` |
| +------------------+----------------------------+
| | Maximum number of ripup for *strap* segments |
+-----------------------------------+------------------+----------------------------+
| ``kite.localRipupLimit`` | TypeInt | :cb:`9` |
| ``katana.localRipupLimit`` | TypeInt | :cb:`9` |
| +------------------+----------------------------+
| | Maximum number of ripup for *local* segments |
+-----------------------------------+------------------+----------------------------+
| ``kite.globalRipupLimit`` | TypeInt | :cb:`5` |
| ``katana.globalRipupLimit`` | TypeInt | :cb:`5` |
| +------------------+----------------------------+
| | Maximum number of ripup for *global* segments,|
| | when this limit is reached, triggers topologic|
| | modification |
+-----------------------------------+------------------+----------------------------+
| ``kite.longGlobalRipupLimit`` | TypeInt | :cb:`5` |
| ``katana.longGlobalRipupLimit`` | TypeInt | :cb:`5` |
| +------------------+----------------------------+
| | Maximum number of ripup for *long global* |
| | segments, when this limit is reached, triggers|
@ -606,24 +591,8 @@ Appart from the obvious ``--text`` options, all can be used for text and graphic
| `-c <cell>|--cell=<cell>` | The name of the design to load, without |
| | leading path or extention. |
+-----------------------------+------------------------------------------------+
| `-g|--load-global` | Reload a global routing solution from disk. |
| | The file containing the solution must be named |
| | `<cell>.kgr`. |
+-----------------------------+------------------------------------------------+
| `--save-global` | Save the global routing solution, into a file |
| | named `<design>.kgr`. |
+-----------------------------+------------------------------------------------+
| `-e <ratio>|--edge=<ratio>` | Change the edge capacity for the global |
| | router, between 0 and 1 (|Knik|). |
+-----------------------------+------------------------------------------------+
| `-G|--global-route` | Run the global router (|Knik|). |
+-----------------------------+------------------------------------------------+
| `-R|--detailed-route` | Run the detailed router (|Kite|). |
+-----------------------------+------------------------------------------------+
| `-s|--save-design=<routed>` | The design into which the routed layout will |
| | be saved. It is strongly recommanded to choose |
| | a different name from the source (unrouted) |
| | design. |
| `-m <val>|--margin=<val>` | Percentage *val* of white space for the placer |
| | (|Etesian|). |
+-----------------------------+------------------------------------------------+
| `--events-limit=<count>` | The maximal number of events after which the |
| | router will stops. This is mainly a failsafe |
@ -632,6 +601,15 @@ Appart from the obvious ``--text`` options, all can be used for text and graphic
| | any design of `100K`. gates. For bigger |
| | designs you may wants to increase this limit. |
+-----------------------------+------------------------------------------------+
| `-G|--global-route` | Run the global router (|Katana|). |
+-----------------------------+------------------------------------------------+
| `-R|--detailed-route` | Run the detailed router (|Katana|). |
+-----------------------------+------------------------------------------------+
| `-s|--save-design=<routed>` | The design into which the routed layout will |
| | be saved. It is strongly recommanded to choose |
| | a different name from the source (unrouted) |
| | design. |
+-----------------------------+------------------------------------------------+
| `--stratus-script=<module>` | Run the Python/Stratus script ``module``. |
| | See `Python Scripts in Cgt`_. |
+-----------------------------+------------------------------------------------+
@ -643,16 +621,7 @@ Some Examples :
* Run both global and detailed router, then save the routed design : ::
> cgt -v -t -G -R --cell=design --save-design=design_kite
* Load a previous global solution, run the detailed router, then save the
routed design : ::
> cgt -v -t --load-global -R --cell=design --save-design=design_kite
* Run the global router, then save the global routing solution : ::
> cgt -v -t -G --save-global --cell=design
> cgt -v -t -G -R --cell=design --save-design=design_r
Miscellaneous Settings

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@ -3,7 +3,7 @@ Landscape
Center
Inches
Letter
100.00
200.00
Single
-2
1200 2
@ -190,6 +190,23 @@ Single
-1800 4500
4 1 0 50 -1 18 14 0.0000 4 225 840 -1800 4275 pck_px\001
-6
6 -75 6225 2475 7575
2 1 0 4 0 7 50 -1 -1 40.000 0 0 -1 0 0 7
1200 7500 0 7500 0 6675 375 6300 2400 6300 2400 7500
1200 7500
2 1 0 4 0 7 50 -1 -1 40.000 0 0 -1 0 0 4
600 6300 600 6675 1800 6675 1800 6300
2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 0 2.00 120.00 240.00
900 6675 600 7200
2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 0 2.00 120.00 240.00
1200 6675 1200 7200
2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 0 2.00 120.00 240.00
1500 6675 1800 7200
4 1 0 50 -1 18 14 0.0000 4 135 660 1200 6525 coeur\001
-6
2 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
-6600 2400 -5400 2400 -5400 3000 -6600 3000 -6600 2400
2 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
@ -198,8 +215,6 @@ Single
-3000 2400 -1800 2400 -1800 3000 -3000 3000 -3000 2400
2 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
-1200 2400 0 2400 0 3000 -1200 3000 -1200 2400
2 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
600 2400 1800 2400 1800 3000 600 3000 600 2400
2 1 0 4 0 7 50 -1 -1 0.000 0 0 -1 0 0 7
-6000 4500 -6600 4500 -6600 4125 -6375 3900 -5400 3900 -5400 4500
-6000 4500
@ -218,7 +233,7 @@ Single
2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 240.00
-600 3000 -1800 3900
2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
2 1 0 2 19 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 240.00
1200 3000 1200 3900
2 1 0 4 0 7 50 -1 -1 0.000 0 0 -1 0 0 7
@ -250,20 +265,23 @@ Single
2 1 0 2 0 7 50 -1 -1 24.000 0 0 -1 1 0 2
1 0 2.00 120.00 240.00
-1650 1875 1200 2400
2 1 0 4 0 7 50 -1 -1 40.000 0 0 -1 0 0 7
1200 5100 0 5100 0 4275 375 3900 2400 3900 2400 5100
1200 5100
2 1 0 4 0 7 50 -1 -1 40.000 0 0 -1 0 0 4
2 1 0 4 19 7 50 -1 -1 0.000 0 0 -1 0 0 4
600 3900 600 4275 1800 4275 1800 3900
2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 0 2.00 120.00 240.00
900 4275 600 4800
2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
2 1 0 2 19 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 0 2.00 120.00 240.00
1200 4275 1200 4800
2 1 0 4 19 7 50 -1 -1 0.000 0 0 -1 0 0 7
1200 5625 0 5625 0 4275 375 3900 2400 3900 2400 5625
1200 5625
2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 0 2.00 120.00 240.00
1500 4275 1800 4800
1 1 2.00 120.00 240.00
1200 5400 1200 6300
2 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
600 4800 1800 4800 1800 5400 600 5400 600 4800
2 2 0 2 19 7 50 -1 -1 0.000 0 0 -1 0 0 5
600 2400 1800 2400 1800 3000 600 3000 600 2400
2 2 0 2 19 7 50 -1 -1 0.000 0 0 -1 0 0 5
4650 2550 8550 2550 8550 6450 4650 6450 4650 2550
4 0 0 50 -1 14 16 0.0000 4 210 1980 -5100 6975 Cell (Model)\001
4 0 0 50 -1 12 16 0.0000 4 150 1320 -5100 7875 Instance\001
4 1 0 50 -1 18 14 0.0000 4 225 630 -6000 4275 pi_px\001
@ -272,9 +290,11 @@ Single
4 1 0 50 -1 16 14 0.0000 4 165 600 -4200 2775 p_ovr\001
4 1 0 50 -1 16 14 0.0000 4 165 540 -2400 2775 p_ng\001
4 1 0 50 -1 16 14 0.0000 4 225 510 -600 2775 p_ck\001
4 1 0 50 -1 16 14 0.0000 4 120 465 1200 2775 core\001
4 1 19 50 -1 16 14 0.0000 4 120 735 1200 2775 corona\001
4 1 0 50 -1 16 14 0.0000 4 225 795 -6000 7875 i_name\001
4 1 0 50 -1 18 14 0.0000 4 180 975 -6000 6975 m_name\001
4 1 0 50 -1 14 18 0.0000 4 135 900 6525 4575 coeur\001
4 1 0 50 -1 18 14 0.0000 4 180 1035 -2400 1725 amd2901\001
4 1 0 50 -1 18 14 0.0000 4 135 660 1200 4125 coeur\001
4 1 19 50 -1 18 14 0.0000 4 135 810 1200 4125 corona\001
4 1 0 50 -1 16 14 0.0000 4 120 465 1200 5175 core\001
4 1 19 50 -1 14 18 0.0000 4 135 1080 6600 6375 corona\001
4 1 0 50 -1 18 14 0.0000 4 165 885 -2400 1725 am2901\001

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@ -12,40 +12,28 @@
\begin{center}
\begin{figure}[t]
\begin{center}
\includegraphics[scale=0.4]{../etc/images/logoLIP6_SU_CNRS.pdf}
\end{center}
\end{figure}
\hfill \includegraphics[height=2.0cm]{../etc/images/Logo-LIP6-bleugris}
\hfill \includegraphics[height=1.8cm]{../etc/images/Logo-SU}
\hfill \includegraphics[height=2.0cm]{../etc/images/Logo-CNRS}
\hfill
\\*[2cm]
\vspace{2cm}
\huge \textsc{Sorbonne Université}
\huge \textsc{Sorbonne Université} \\*[1cm]
\vspace{1cm}
\huge {\textsc{lip6} Laboratory}
\vspace{3cm}
\huge {\textsc{lip6} Laboratory} \\*[3cm]
\Huge \textsc{Coriolis}
\vspace{1cm}
\Huge \textbf{User's Guide}
\vspace{1cm}
\Huge \textbf{\textsc{Coriolis}} \\*[1cm]
\Huge \textbf{User's Guide} \\*[1cm]
\huge {Jean-Paul \textsc{Chaput}}
\vspace{4cm}
\huge {Jean-Paul \textsc{Chaput}} \\
\Large\href{mailto:Jean-Paul.Chaput@lip6.fr}{Jean-Paul.Chaput@lip6.fr}\\*[4cm]
\begin{figure}[!h]
\begin{center}
\includegraphics[scale=1.0]{../etc/images/logoCC.pdf}
\end{center}
\end{figure}
\normalsize
This work is licensed under a\\
Creative Commons Attribution-NonCommercial-ShareALike 4.0 International License.\\
Creative Commons License \href{https://creativecommons.org/licenses/by-nc-sa/4.0/} {creativecommons.org/licenses/by-nc-sa/4.0/}
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This work is licensed under a \\
Creative Commons Attribution-NonCommercial-ShareALike 4.0 International License. \\
Creative Commons License \href{https://creativecommons.org/licenses/by-nc-sa/4.0/}{creativecommons.org/licenses/by-nc-sa/4.0/}
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