* Change: In Hurricane::Error constructors disable the backtrace generation.
(*very* slow).
* Change: In Hurricane::Library::getHierarchicalname(), more compact
naming. Remove the name of the root library.
* New: In Hurricane::Net, new type "FUSED", for component with no net.
More efficient than having one net for each.
* Change: In CellViewer, BreakpointWidget, use Angry Birds icons.
* Change: In CellWidget::State, use the hierarchical name (cached) as key
to the state. This allow to load two cells with the same name but from
different libraries in the widget history.
* Change: In PyGraphics, export "isEnabled()" and "isHighDpi()" functions.
* Change: In CRL/etc/symbolic/cmos/plugin.conf, and
CRL/etc/common/plugin.conf use the physical dimensions converters.
* Change: In CRL/etc/symbolic/cmos/technology.conf, make the GDS layer
table coherent with the default Alliance cmos.rds.
* New: CRL/python/helpers/io.py, put ErrorMessage new implementation here,
along with a new ErrorWidget written in PyQt4. It seems finally that
PyQt4 can be used alongside Coriolis Qt widgets.
New ErrorMessage.catch() static function to manage all exceptions
in except clauses.
* Change: In CRL/python/helpers/, no longer use ErrorMessage.wrapPrint(),
directly print it.
Rewrite the utilities to display Python stack traces "textStacktrace()"
and "showStacktrace()".
* Change: In CRL::AllianceFramework, shorten the names of the libraries.
* Change: In CRL::ApParser & CRL::ApDriver, more accurate translation between
Alliance connectors (C record) and Hurricane::Pin objects. Pin are no
longer made square but thin and oriented in the connecting direction.
Use the new fused net for unnamed components.
* New: In CRL::GdsParser, implementation of SREF parsing, i.e. instances.
Due to the unordered nature of the GDS stream, instances creation are
delayed until the whole stream has been parsed and only then are they
created.
For the sake of reading back Alliance s2r GDS, we assume that any
TEXT following a boundary is the Net name the boundary (component)
belongs to.
Create abutment box for Cells, computed from the bounding box, so
the Hurricane QuadTree could work properly.
Make use of the fused net for unnamed components.
* New: In Cumulus/plugins/chip, complete rewrite of the I/O pad management.
Now we can mix real (foundry) pads and a symbolic core.
To cleanly support the de-coupling between the real part and the
symbolic one we introduce a new intermediary hierarchical level, the
corona. We have now:
Chip --> Pads + Corona --> Core.
At chip level (and if we are using real pads) the layout is fully
real (excepting the corona).
The Corona contains everything that is symbolic. It has symbolic
wires extending outward the abutment box to make contact with the
real wires coming from the pads.
In the pad ring we can use corners instances (or not), pad spacers
or directly draw wires between connectors ring pads.
Provide two flavors: placement only or full place & route.
WARNING: If routing in a second step, *do not route* the *Chip* but
the *Corona*.
* Change: In Cumulus/plugins/clocktree, give the modified Cell an
additional extension of "_cts" (Clock Tree Synthesis) instead of
"_clocked", to follow the common convention.
* New: In cumulus/plugins/S2R.py, encapsulate call to Alliance S2R and
reload the translated Cell in the editor.
* New: In cumulus/plugins/core2chip, provide an utility to automatically
create a chip from a core. To work this plugins must have a basic
understanding of the pad functionalities which may differs from
foundry to foundry. So a base class CoreToChip is created, then for
each supported pad foundry a derived class is added. Currently we
support AMS c35b4 and Alliance symbolic cmos.
* Bug: In Anabatic::Configuration, read the right configuration parameter
"anabatic.topRoutinglayer" (Katana), and not the one for Katabatic...
* Change: In Unicorn/cgt.py, process the plugins in alphabetical order
to ensure a reproductible ordering of the menus...
* New: In Cumulus, first versions of the ClockTree and Chip plugins.
Clock Tree plugin:
- It is strongly advised to use have 4 metal routing layers for the
tree to work. Otherwise, problems can arise with the detailed
routing (fully obstructed terminals).
- H-Tree can only be build (for now) for design with a form factor
between 0.5 an 2.
- The tree is created at the block top-level and only the leafs are
trans-hierarchically created on the instances/models. The new
cell with a clock tree, along with all it's sub-models is created
with a "_clocked" suffix.
- Leaf cells are connected through a simple Minimum Steiner Tree.
- Shorts are avoided by a systematic shift of the wires according
to their kind. No wire must pre-exist. When used as a sub-module
of "chip" the wires cannot be moved. When created on a block,
the wires can be loaded in the detailed router as manual global
router.
Chip Plugin:
- Perform the pad placement and corona creation. Replacement at
last of the clunky code from Wu Yifei.
- Relies on a Python configuration file '<design>_chip.py' with
a "chip" dictionnary.
* New: In Cumulus, new Alliance.py module (*not* a plugin) providing
an encapsulation for Alliance command line tools. The other main
feature is that it provides a "Makefile like" behavior. Based on
the command dependencies a DAG is contructed, then a static
ordering of the commands. Commands are then executed to rebuild
outdated target.
The Alliance environment supplied to the commands is read from
the Coriolis configuration file <alliance.conf>.
For this first evaluation version, only <boom>, <boog> and
<loon> support are provided.
It still not clear how to encapsulate the Coriolis tools in
the same way.
* Change: In CRL Core, in helpers/__init__.py, change the way the static
initialization (module) is done. All the commands are put inside
a "staticInitialization()" function, which is then explicitly
called by others. This is a better solution agains *no* or *twice*
initialization. Modificate <coriolisInit.py> accordingly (as
<Alliance.py> from Cumulus.
Jean-Paul Chaput