2010-03-09 09:24:55 -06:00
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// -*- C++ -*-
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//
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// This file is part of the Coriolis Software.
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2016-03-06 05:36:18 -06:00
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// Copyright (c) UPMC 2008-2016, All Rights Reserved
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2010-03-09 09:24:55 -06:00
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//
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2012-12-22 12:22:54 -06:00
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// +-----------------------------------------------------------------+
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2010-03-09 09:24:55 -06:00
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// | C O R I O L I S |
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// | K i t e - D e t a i l e d R o u t e r |
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// | |
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// | Author : Jean-Paul CHAPUT |
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// | E-mail : Jean-Paul.Chaput@asim.lip6.fr |
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// | =============================================================== |
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// | C++ Module : "./BuildPowerRails.cpp" |
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2012-12-22 12:22:54 -06:00
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// +-----------------------------------------------------------------+
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2010-03-09 09:24:55 -06:00
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2013-12-03 18:59:29 -06:00
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#include <map>
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#include <list>
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Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
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#include "hurricane/DebugSession.h"
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2013-12-03 18:59:29 -06:00
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#include "hurricane/Error.h"
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#include "hurricane/Warning.h"
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#include "hurricane/DataBase.h"
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#include "hurricane/Technology.h"
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#include "hurricane/BasicLayer.h"
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#include "hurricane/RegularLayer.h"
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#include "hurricane/Horizontal.h"
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#include "hurricane/Vertical.h"
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Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
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#include "hurricane/RoutingPad.h"
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2013-12-03 18:59:29 -06:00
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#include "hurricane/NetExternalComponents.h"
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Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
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#include "hurricane/NetRoutingProperty.h"
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2013-12-03 18:59:29 -06:00
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#include "hurricane/Instance.h"
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#include "hurricane/Plug.h"
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#include "hurricane/Path.h"
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#include "hurricane/Query.h"
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#include "crlcore/AllianceFramework.h"
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2015-06-06 11:22:48 -05:00
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#include "katabatic/GCell.h"
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#include "katabatic/GCellGrid.h"
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2013-12-03 18:59:29 -06:00
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#include "kite/RoutingPlane.h"
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#include "kite/TrackFixedSegment.h"
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#include "kite/Track.h"
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#include "kite/KiteEngine.h"
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2010-03-09 09:24:55 -06:00
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namespace {
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using namespace std;
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using Hurricane::tab;
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using Hurricane::inltrace;
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2013-12-03 18:59:29 -06:00
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using Hurricane::ltracein;
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using Hurricane::ltraceout;
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Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
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using Hurricane::DebugSession;
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2010-03-09 09:24:55 -06:00
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using Hurricane::ForEachIterator;
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* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
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using Hurricane::Warning;
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using Hurricane::Error;
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2010-03-09 09:24:55 -06:00
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using Hurricane::DbU;
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using Hurricane::Box;
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using Hurricane::Interval;
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Correctly manage clock net isolateds from the main clock.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
given a path and a leaf net. This method is slow and must not be
used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
of clock nets was incomplete. The case of unrouted clock nets
that where not connected to the top core clock net, like the
one in the datapath registers was faulty. They were partly
recognized as unrouteds and partly as blockage generating a
routing deadlock: routage impossible due to blockage generated
from itself...
* New: In Stratus1, add a buildModel() utility function to automate
the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
2015-02-25 15:17:44 -06:00
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using Hurricane::Net;
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using Hurricane::DeepNet;
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2010-03-09 09:24:55 -06:00
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using Hurricane::Horizontal;
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using Hurricane::Vertical;
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Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
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using Hurricane::RoutingPad;
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2010-03-09 09:24:55 -06:00
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using Hurricane::NetExternalComponents;
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Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
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using Hurricane::NetRoutingExtension;
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using Hurricane::NetRoutingState;
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* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
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using Hurricane::Instance;
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using Hurricane::Plug;
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using Hurricane::Path;
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2010-03-09 09:24:55 -06:00
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using Hurricane::Query;
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using Hurricane::Go;
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using Hurricane::Rubber;
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using Hurricane::Layer;
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using Hurricane::BasicLayer;
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using Hurricane::RegularLayer;
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using Hurricane::Transformation;
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using Hurricane::Technology;
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using Hurricane::DataBase;
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* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
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using CRL::AllianceFramework;
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2015-06-06 11:22:48 -05:00
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using Katabatic::GCell;
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* ./Kite:
- New: In BuildPowerRails, special processing for the power ring segments.
The "diagonal" of vias at each corner is causing a misbehavior of the
routing algorithm (due to fully saturated GCells in one direction).
As a temporary fix, extend the segments so they form a "square corner".
(problem arise on "d_in_i(22)").
- New: In RoutingEvent::_processNegociate, disable the "isForcedToHint()"
feature. No noticeable loss of quality or speed.
- New: In TrackElement/TrackSegment, wraps the AutoSegment parent's mechanism.
Allows to gets the DataNegociate of either the segment or it's parent.
- New: State::solveFullBlockages(), dedicated method to solves the case when
all the allowed tracks of a segment are blocked, tries to moves up
local segments and to break-up global ones.
- New: RoutingEventLoop, a more sophisticated way to detect looping.
Maintain a dynamic histogram of the last N (default 10) segments routeds,
with the count of how many times they have occurred. If that count
exeed 40, we *may* be facing a loop.
- Change: In State::conflictSolve1, implement new policy. The global segments
no more can be broken by local ones. The idea behind is that breaking
a global on the request of a local will only produce more cluttering
in the GCell. Globals must be keep straigth pass through, especially
inside near-saturated GCells. Globals breaking however can occurs at
another global's request.
- Change: In TrackCost, implement the new policy about locals segments that
cannot break globals segments. The sorting class now accept flags to
modulate the sorting function. Two options avalaibles: IgnoreAxisWeigth
(to uses for strap segments) and DiscardGlobals (to uses with locals).
- Change: In TrackCost, the "distance to fixed" have now an upper bound of
50 lambdas (no need to be greater because it means it's outside the
begin & en GCells). Take account not only of fixed segment, but also
of placed segments which makes bound.
- Bug: In Track::_check(), while calling each individual TrackSegment check,
uses it as the *first* argument of the "or", otherwise it may not be
called.
- Bug: In ProtectRoutingPad, loop over segment Collections while modificating
it was producing non-deterministic results. The fact that a collection
must be not modificated while beeing iterated is becoming a more and more
painful problem.
2010-12-30 12:42:17 -06:00
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using Katabatic::ChipTools;
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Add NetRoutingState (Property) on Nets to tell Kite what to do.
* New: In Katabatic, add the ability to decorate some (i.e. few) nets
with a state that indicate to Katabatic & Kite what to do with it.
The possible states are:
1. Fixed : all the wire are in fixed positions. The router cannot
move them and account them as obstacles.
2. ManualGlobalRoute : a user-defined topology is supplied. The
wires still have to be detailed route in "Detailed Pre-Route"
but will be skipped for the global routing and fixed for the
general Detailed route.
3. AutomaticGlobalRoute : ordinary nets, to be global routed then
detail routed.
4. Excluded : do not try to global or detail route thoses nets.
5. MixedPreRoute : mask combining Fixed and ManualGlobalRoute.
Not all nets have this property, only those that needs a special
processing.
To ease the access to the state, it is nested inside a
PrivateProperty in the net (NetRoutingProperty), with an extension
access class (NetRoutingExtension).
* New: In Kite, take account of NetRoutingState. Pointers to the
net's states are strored inside an internal map for faster access.
The property is *not* deleted when Kite is destroyed. The property
will remains until the Net itself is destroyed.
As a consequence, the lists that where passed to high level
function are removed as the information can now be accessed directly
through the net NetRoutingProperty.
* New: In Unicorn, in CgtMain, comply with the update interface.
* New: In documentation, update the User's Guide to explain the Pre-routed
step of Kite.
2014-07-02 07:36:58 -05:00
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using Katabatic::NetRoutingExtension;
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2010-03-09 09:24:55 -06:00
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using namespace Kite;
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Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
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// -------------------------------------------------------------------
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// Local Functions.
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void destroyRing ( Net* net )
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{
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2015-05-26 07:31:38 -05:00
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for( RoutingPad* rp : net->getRoutingPads() ) {
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Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
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bool allMasters = true;
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vector<Hook*> ring;
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2015-05-26 07:31:38 -05:00
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for( Hook* hook : rp->getBodyHook()->getHooks() ) {
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if (not hook->isMaster()) { allMasters = false; break; }
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ring.push_back( hook );
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Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
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}
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if (allMasters) {
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2015-05-26 07:31:38 -05:00
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for ( auto hook : ring ) {
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hook->_setNextHook( hook );
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Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
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}
|
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}
|
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}
|
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}
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* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
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// -------------------------------------------------------------------
|
|
|
|
|
// Class : "::GlobalNetTable".
|
|
|
|
|
|
|
|
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|
class GlobalNetTable {
|
|
|
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public:
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
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enum Flag { ClockIsRouted=0x0001 };
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public:
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GlobalNetTable ( KiteEngine* );
|
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bool isCoreClockNetRouted ( const Net* ) const;
|
Correctly manage clock net isolateds from the main clock.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
given a path and a leaf net. This method is slow and must not be
used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
of clock nets was incomplete. The case of unrouted clock nets
that where not connected to the top core clock net, like the
one in the datapath registers was faulty. They were partly
recognized as unrouteds and partly as blockage generating a
routing deadlock: routage impossible due to blockage generated
from itself...
* New: In Stratus1, add a buildModel() utility function to automate
the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
2015-02-25 15:17:44 -06:00
|
|
|
inline Cell* getTopCell () const;
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
Net* getRootNet ( const Net*, Path ) const;
|
|
|
|
|
inline Net* getVdde () const;
|
|
|
|
|
inline Net* getVddi () const;
|
|
|
|
|
inline Net* getVsse () const;
|
|
|
|
|
inline Net* getVssi () const;
|
|
|
|
|
inline Net* getCk () const;
|
|
|
|
|
inline Net* getCki () const;
|
|
|
|
|
inline Net* getCko () const;
|
|
|
|
|
inline Net* getBlockage () const;
|
|
|
|
|
inline void setBlockage ( Net* );
|
|
|
|
|
private:
|
|
|
|
|
bool guessGlobalNet ( const Name&, Net* );
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
private:
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
unsigned int _flags;
|
|
|
|
|
Name _vddePadNetName;
|
|
|
|
|
Name _vddiPadNetName;
|
|
|
|
|
Name _vssePadNetName;
|
|
|
|
|
Name _vssiPadNetName;
|
|
|
|
|
Name _ckPadNetName;
|
|
|
|
|
Name _ckiPadNetName;
|
|
|
|
|
Name _ckoPadNetName;
|
|
|
|
|
Net* _vdde;
|
|
|
|
|
Net* _vddi;
|
|
|
|
|
Net* _vsse;
|
|
|
|
|
Net* _vssi;
|
|
|
|
|
Net* _ck; // Clock net on the (external) pad.
|
|
|
|
|
Net* _cki; // Clock net in the pad ring.
|
|
|
|
|
Net* _cko; // Clock net of the core (design).
|
|
|
|
|
Net* _blockage;
|
Correctly manage clock net isolateds from the main clock.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
given a path and a leaf net. This method is slow and must not be
used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
of clock nets was incomplete. The case of unrouted clock nets
that where not connected to the top core clock net, like the
one in the datapath registers was faulty. They were partly
recognized as unrouteds and partly as blockage generating a
routing deadlock: routage impossible due to blockage generated
from itself...
* New: In Stratus1, add a buildModel() utility function to automate
the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
2015-02-25 15:17:44 -06:00
|
|
|
Cell* _topCell;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
Correctly manage clock net isolateds from the main clock.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
given a path and a leaf net. This method is slow and must not be
used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
of clock nets was incomplete. The case of unrouted clock nets
that where not connected to the top core clock net, like the
one in the datapath registers was faulty. They were partly
recognized as unrouteds and partly as blockage generating a
routing deadlock: routage impossible due to blockage generated
from itself...
* New: In Stratus1, add a buildModel() utility function to automate
the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
2015-02-25 15:17:44 -06:00
|
|
|
inline Cell* GlobalNetTable::getTopCell () const { return _topCell; }
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
inline Net* GlobalNetTable::getVdde () const { return _vdde; }
|
|
|
|
|
inline Net* GlobalNetTable::getVddi () const { return _vddi; }
|
|
|
|
|
inline Net* GlobalNetTable::getVsse () const { return _vsse; }
|
|
|
|
|
inline Net* GlobalNetTable::getVssi () const { return _vssi; }
|
|
|
|
|
inline Net* GlobalNetTable::getCk () const { return _ck; }
|
|
|
|
|
inline Net* GlobalNetTable::getCki () const { return _cki; }
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
inline Net* GlobalNetTable::getCko () const { return _cko; }
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
inline Net* GlobalNetTable::getBlockage () const { return _blockage; }
|
|
|
|
|
inline void GlobalNetTable::setBlockage ( Net* net ) { _blockage=net; }
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
Implementation of pre-routing support (for clock-tree compliance).
* New: In Katabatic, in <AutoContact>, this class is no longer derived
from ExtentionGo. With the simplificated AutoContacts, there is no
reason to do so, and it will save some QuadTree insertions/deletions.
New factory function AutoContact::createFrom(Contact*) which try to
build an AutoContact on top of a Hurricane::Contact. Of course that
base contact *must fit* into one of the predefined Contact
configurations (Terminal, Turn, HTee or VTee).
NOTE: This implies that the pre-routed segments & contacts *are*
correctly articulated, which is not the case when a Cell is read
from disk in "ap" format. The pre-routing feature must be used for
now without any re-read from disk. We will implement a re-articulating
pre-process in the future.
* Change: In Katabatic, in <AutoContact> derived classes, the ::updateCache()
method now display an accurate error message if a segment is connected
but has no AutoSegment conterpart (i.e. the lookup fails).
* New: In Katabatic, in <AutoSegment>, the ::computeOptimal() method is
short-circuited for pre-routed segments, the optimal axis position is
considered to be the one it is currently on (i.e. we trust the designer).
* New: In Katabatic, in <KatabaticEngine>, the ::loadGlobalRouting()
method now accept a map of excluded nets (same as Knik). This map is
the one of pre-routed nets.
* New: In Katabatic, in layer assignment, do not try to displace fixed
segments...
* New: In Katabatic, in <AutoSegment>, new flag SegUserDefined and related
methods to know if a segment comes from the global router (Knik) or
is pre-routed (supplied by the user).
* New: In Kite, In <BuildPowerRails>, support (exclusion) for pre-routed
nets.
* New: In Kite, In <GraphicKiteEngine> new menu entry for running the
router on pre-routed nets ("Detailed Pre-Route"), also integrated
in the all-on-one route command.
* New: In Kite, In KiteEngine, new method ::_initDataBase() that group
all the initialisation steps. It is a mix of calls between Knik and
Kite initializations which are intertwinneds (may have to devellop
a shared common base at a later point). It creates the Knik grid,
then the Katabatic grid, then load pre-routed wires and power rails
and protect isolated RoutingPads.
Add support for a map of pre-routed nets (to be excluded for
Knik calls).
The method "::run()" now uses function flags, firstly to know if
it is managing pre-routed wires or general purposes ones.
* New: In Kite, in <NegociateWindow>, the "::run()" methods has now two
modes. The normal one and the 'KtPreRoutedStage' that is for routing
pre-routed nets. When in pre-route stage, the wires are fixed at the
end of this step.
* New: In Kite, in <TrackElement> add decorator for AutoSegment
isUsedDefined().
* New: In Kite, in <TrackSegment>, the various ::canDogleg() methods
returns false for a pre-routed (user-defined segment).
* New: In Kite, in PyKiteEngine, added new method runNegociatePreRouted().
2014-06-21 13:16:47 -05:00
|
|
|
GlobalNetTable::GlobalNetTable ( KiteEngine* kite )
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
: _flags (0)
|
|
|
|
|
, _vddePadNetName("vdde")
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
, _vddiPadNetName("vddi")
|
|
|
|
|
, _vssePadNetName("vsse")
|
|
|
|
|
, _vssiPadNetName("vssi")
|
|
|
|
|
, _ckPadNetName ("pad" )
|
|
|
|
|
, _ckiPadNetName ("ck" )
|
|
|
|
|
, _ckoPadNetName ("cko" )
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
, _vdde (NULL)
|
|
|
|
|
, _vddi (NULL)
|
|
|
|
|
, _vsse (NULL)
|
|
|
|
|
, _vssi (NULL)
|
|
|
|
|
, _ck (NULL)
|
|
|
|
|
, _cki (NULL)
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
, _cko (NULL)
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
, _blockage(NULL)
|
Correctly manage clock net isolateds from the main clock.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
given a path and a leaf net. This method is slow and must not be
used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
of clock nets was incomplete. The case of unrouted clock nets
that where not connected to the top core clock net, like the
one in the datapath registers was faulty. They were partly
recognized as unrouteds and partly as blockage generating a
routing deadlock: routage impossible due to blockage generated
from itself...
* New: In Stratus1, add a buildModel() utility function to automate
the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
2015-02-25 15:17:44 -06:00
|
|
|
, _topCell (kite->getCell())
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
{
|
Correctly manage clock net isolateds from the main clock.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
given a path and a leaf net. This method is slow and must not be
used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
of clock nets was incomplete. The case of unrouted clock nets
that where not connected to the top core clock net, like the
one in the datapath registers was faulty. They were partly
recognized as unrouteds and partly as blockage generating a
routing deadlock: routage impossible due to blockage generated
from itself...
* New: In Stratus1, add a buildModel() utility function to automate
the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
2015-02-25 15:17:44 -06:00
|
|
|
if (_topCell == NULL) return;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
2015-03-03 04:11:22 -06:00
|
|
|
cmess1 << " o Looking for powers/grounds & clocks." << endl;
|
|
|
|
|
|
Implementation of pre-routing support (for clock-tree compliance).
* New: In Katabatic, in <AutoContact>, this class is no longer derived
from ExtentionGo. With the simplificated AutoContacts, there is no
reason to do so, and it will save some QuadTree insertions/deletions.
New factory function AutoContact::createFrom(Contact*) which try to
build an AutoContact on top of a Hurricane::Contact. Of course that
base contact *must fit* into one of the predefined Contact
configurations (Terminal, Turn, HTee or VTee).
NOTE: This implies that the pre-routed segments & contacts *are*
correctly articulated, which is not the case when a Cell is read
from disk in "ap" format. The pre-routing feature must be used for
now without any re-read from disk. We will implement a re-articulating
pre-process in the future.
* Change: In Katabatic, in <AutoContact> derived classes, the ::updateCache()
method now display an accurate error message if a segment is connected
but has no AutoSegment conterpart (i.e. the lookup fails).
* New: In Katabatic, in <AutoSegment>, the ::computeOptimal() method is
short-circuited for pre-routed segments, the optimal axis position is
considered to be the one it is currently on (i.e. we trust the designer).
* New: In Katabatic, in <KatabaticEngine>, the ::loadGlobalRouting()
method now accept a map of excluded nets (same as Knik). This map is
the one of pre-routed nets.
* New: In Katabatic, in layer assignment, do not try to displace fixed
segments...
* New: In Katabatic, in <AutoSegment>, new flag SegUserDefined and related
methods to know if a segment comes from the global router (Knik) or
is pre-routed (supplied by the user).
* New: In Kite, In <BuildPowerRails>, support (exclusion) for pre-routed
nets.
* New: In Kite, In <GraphicKiteEngine> new menu entry for running the
router on pre-routed nets ("Detailed Pre-Route"), also integrated
in the all-on-one route command.
* New: In Kite, In KiteEngine, new method ::_initDataBase() that group
all the initialisation steps. It is a mix of calls between Knik and
Kite initializations which are intertwinneds (may have to devellop
a shared common base at a later point). It creates the Knik grid,
then the Katabatic grid, then load pre-routed wires and power rails
and protect isolated RoutingPads.
Add support for a map of pre-routed nets (to be excluded for
Knik calls).
The method "::run()" now uses function flags, firstly to know if
it is managing pre-routed wires or general purposes ones.
* New: In Kite, in <NegociateWindow>, the "::run()" methods has now two
modes. The normal one and the 'KtPreRoutedStage' that is for routing
pre-routed nets. When in pre-route stage, the wires are fixed at the
end of this step.
* New: In Kite, in <TrackElement> add decorator for AutoSegment
isUsedDefined().
* New: In Kite, in <TrackSegment>, the various ::canDogleg() methods
returns false for a pre-routed (user-defined segment).
* New: In Kite, in PyKiteEngine, added new method runNegociatePreRouted().
2014-06-21 13:16:47 -05:00
|
|
|
AllianceFramework* af = AllianceFramework::get();
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
|
|
|
|
bool hasPad = false;
|
2015-05-26 07:31:38 -05:00
|
|
|
for( Instance* instance : _topCell->getInstances() ) {
|
|
|
|
|
if (af->isPad(instance->getMasterCell())) {
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
if (not hasPad) {
|
|
|
|
|
cmess1 << " o Design has pads, assuming complete chip top structure." << endl;
|
|
|
|
|
hasPad = true;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
}
|
|
|
|
|
|
2015-05-26 07:31:38 -05:00
|
|
|
string padName = getString( instance->getMasterCell()->getName() );
|
Correction in plugins to support msxlib compatible pads.
* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
2014-09-13 10:45:30 -05:00
|
|
|
if (padName.substr(0,8) == "pvddeck_") {
|
2015-05-26 07:31:38 -05:00
|
|
|
cmess1 << " o Reference power pad: " << instance->getName()
|
|
|
|
|
<< "(model:" << instance->getMasterCell()->getName() << ")." << endl;
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
|
|
|
|
|
// Guessing the power, ground and clock nets from *this* pad connexions.
|
2015-05-26 07:31:38 -05:00
|
|
|
for( Plug* plug : instance->getPlugs() ) {
|
|
|
|
|
Net* masterNet = plug->getMasterNet();
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
Net::Type netType = masterNet->getType();
|
|
|
|
|
if ( (netType != Net::Type::POWER )
|
|
|
|
|
and (netType != Net::Type::GROUND)
|
|
|
|
|
and (netType != Net::Type::CLOCK ) ) continue;
|
|
|
|
|
|
2015-05-26 07:31:38 -05:00
|
|
|
Net* net = plug->getNet();
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
if (not net) {
|
Correctly manage clock net isolateds from the main clock.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
given a path and a leaf net. This method is slow and must not be
used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
of clock nets was incomplete. The case of unrouted clock nets
that where not connected to the top core clock net, like the
one in the datapath registers was faulty. They were partly
recognized as unrouteds and partly as blockage generating a
routing deadlock: routage impossible due to blockage generated
from itself...
* New: In Stratus1, add a buildModel() utility function to automate
the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
2015-02-25 15:17:44 -06:00
|
|
|
net = _topCell->getNet( masterNet->getName() );
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
if (not net) {
|
|
|
|
|
cerr << Error("Missing global net <%s> at chip level.",getString(masterNet->getName()).c_str()) << endl;
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
guessGlobalNet( masterNet->getName(), net );
|
|
|
|
|
}
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
}
|
|
|
|
|
|
2015-05-26 07:31:38 -05:00
|
|
|
padName = getString( instance->getMasterCell()->getName() );
|
Correction in plugins to support msxlib compatible pads.
* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
2014-09-13 10:45:30 -05:00
|
|
|
if (padName.substr(0,4) == "pck_") {
|
2015-05-26 07:31:38 -05:00
|
|
|
cmess1 << " o Reference clock pad: " << instance->getName()
|
|
|
|
|
<< "(model:" << instance->getMasterCell()->getName() << ")." << endl;
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
|
|
|
|
|
// Guessing external clock net *only* from *this* pad connexions.
|
2015-05-26 07:31:38 -05:00
|
|
|
for( Plug* plug : instance->getPlugs() ) {
|
|
|
|
|
Net* masterNet = plug->getMasterNet();
|
|
|
|
|
Net* net = plug->getNet();
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
if (not net) {
|
Correctly manage clock net isolateds from the main clock.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
given a path and a leaf net. This method is slow and must not be
used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
of clock nets was incomplete. The case of unrouted clock nets
that where not connected to the top core clock net, like the
one in the datapath registers was faulty. They were partly
recognized as unrouteds and partly as blockage generating a
routing deadlock: routage impossible due to blockage generated
from itself...
* New: In Stratus1, add a buildModel() utility function to automate
the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
2015-02-25 15:17:44 -06:00
|
|
|
net = _topCell->getNet( masterNet->getName() );
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
if (not net) {
|
|
|
|
|
cerr << Error("Missing global net <%s> at chip level.",getString(masterNet->getName()).c_str()) << endl;
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if (masterNet->getName() == _ckPadNetName) {
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
cmess1 << " - Using <" << net->getName() << "> as external chip clock net." << endl;
|
|
|
|
|
_ck = net;
|
|
|
|
|
}
|
|
|
|
|
}
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
if (hasPad) {
|
|
|
|
|
if (_vdde == NULL) cerr << Error("Missing <vdde> net (for pads) at chip level." ) << endl;
|
|
|
|
|
else destroyRing( _vdde );
|
|
|
|
|
if (_vsse == NULL) cerr << Error("Missing <vsse> net (for pads) at chip level." ) << endl;
|
|
|
|
|
else destroyRing( _vsse );
|
Support of RoutingGauge, part 2.
In Katabatic & Kite, remove all hard-coded values related to track pitches.
* New: In <Session>, add more convenience function to access RoutingGauge
characteristics.
* New: In <AutoSegment>, <AutoContact>, add support for the "depth spin",
that is, if the source/target contacts are going "top" or "down".
Used to compute the perpandicular pitch. Need a small modification
of the revalidation mechanism. The observers of <AutoSegment> are
notified when the spin changes.
* New: In <AutoSegment>, the getPPitch() method allow to compute the
"perpandicular pitch". For now it is simply the greatest from the
source perpandicular pitch and the target perpandicular pitch.
Make uses of the "depth spin".
* New: In <TrackElement>, <TrackSegment>, cache the perpandicular pitch.
Updated through the notification from the observable.
2014-05-19 10:58:38 -05:00
|
|
|
if (_vddi == NULL) cerr << Error("Missing <vddi>/<vdd> net (for pads) at top level." ) << endl;
|
|
|
|
|
else destroyRing( _vddi );
|
|
|
|
|
if (_vssi == NULL) cerr << Error("Missing <vssi>/<vss> net (for pads) at top level." ) << endl;
|
|
|
|
|
else destroyRing( _vssi );
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
if (_ck == NULL) cerr << Warning("No <ck> net at (for pads) chip level." ) << endl;
|
|
|
|
|
if (_cki == NULL) cerr << Warning("No <cki> net at (for pads) chip level." ) << endl;
|
|
|
|
|
else destroyRing( _cki );
|
Support of RoutingGauge, part 2.
In Katabatic & Kite, remove all hard-coded values related to track pitches.
* New: In <Session>, add more convenience function to access RoutingGauge
characteristics.
* New: In <AutoSegment>, <AutoContact>, add support for the "depth spin",
that is, if the source/target contacts are going "top" or "down".
Used to compute the perpandicular pitch. Need a small modification
of the revalidation mechanism. The observers of <AutoSegment> are
notified when the spin changes.
* New: In <AutoSegment>, the getPPitch() method allow to compute the
"perpandicular pitch". For now it is simply the greatest from the
source perpandicular pitch and the target perpandicular pitch.
Make uses of the "depth spin".
* New: In <TrackElement>, <TrackSegment>, cache the perpandicular pitch.
Updated through the notification from the observable.
2014-05-19 10:58:38 -05:00
|
|
|
} else {
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
_vddiPadNetName = "";
|
|
|
|
|
_vssiPadNetName = "";
|
|
|
|
|
_ckoPadNetName = "";
|
Support of RoutingGauge, part 2.
In Katabatic & Kite, remove all hard-coded values related to track pitches.
* New: In <Session>, add more convenience function to access RoutingGauge
characteristics.
* New: In <AutoSegment>, <AutoContact>, add support for the "depth spin",
that is, if the source/target contacts are going "top" or "down".
Used to compute the perpandicular pitch. Need a small modification
of the revalidation mechanism. The observers of <AutoSegment> are
notified when the spin changes.
* New: In <AutoSegment>, the getPPitch() method allow to compute the
"perpandicular pitch". For now it is simply the greatest from the
source perpandicular pitch and the target perpandicular pitch.
Make uses of the "depth spin".
* New: In <TrackElement>, <TrackSegment>, cache the perpandicular pitch.
Updated through the notification from the observable.
2014-05-19 10:58:38 -05:00
|
|
|
|
2015-05-26 07:31:38 -05:00
|
|
|
for( Net* net : _topCell->getNets() ) {
|
|
|
|
|
Net::Type netType = net->getType();
|
2015-03-03 04:11:22 -06:00
|
|
|
|
|
|
|
|
if (netType == Net::Type::CLOCK) {
|
2015-05-26 07:31:38 -05:00
|
|
|
if (not net->isExternal()) continue;
|
2015-03-03 04:11:22 -06:00
|
|
|
|
|
|
|
|
if (_ckoPadNetName.isEmpty()) {
|
2015-05-26 07:31:38 -05:00
|
|
|
cmess1 << " - Using <" << net->getName() << "> as internal (core) clock net." << endl;
|
|
|
|
|
_ckoPadNetName = net->getName();
|
|
|
|
|
_cko = net;
|
|
|
|
|
if (NetRoutingExtension::isMixedPreRoute(net)) {
|
2015-03-03 04:11:22 -06:00
|
|
|
cmess1 << " (core clock net is already routed)" << endl;
|
|
|
|
|
_flags |= ClockIsRouted;
|
|
|
|
|
} else {
|
|
|
|
|
cmess1 << " (core clock net will be routed as an ordinary signal)" << endl;
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
cerr << Error("Second clock net <%s> net at top block level will be ignored.\n"
|
|
|
|
|
" (will consider only <%s>)"
|
2015-05-26 07:31:38 -05:00
|
|
|
, getString(net ->getName()).c_str()
|
2015-03-03 04:11:22 -06:00
|
|
|
, getString(_cko->getName()).c_str()
|
|
|
|
|
) << endl;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2015-05-26 07:31:38 -05:00
|
|
|
if (NetRoutingExtension::isManualGlobalRoute(net)) continue;
|
Implementation of pre-routing support (for clock-tree compliance).
* New: In Katabatic, in <AutoContact>, this class is no longer derived
from ExtentionGo. With the simplificated AutoContacts, there is no
reason to do so, and it will save some QuadTree insertions/deletions.
New factory function AutoContact::createFrom(Contact*) which try to
build an AutoContact on top of a Hurricane::Contact. Of course that
base contact *must fit* into one of the predefined Contact
configurations (Terminal, Turn, HTee or VTee).
NOTE: This implies that the pre-routed segments & contacts *are*
correctly articulated, which is not the case when a Cell is read
from disk in "ap" format. The pre-routing feature must be used for
now without any re-read from disk. We will implement a re-articulating
pre-process in the future.
* Change: In Katabatic, in <AutoContact> derived classes, the ::updateCache()
method now display an accurate error message if a segment is connected
but has no AutoSegment conterpart (i.e. the lookup fails).
* New: In Katabatic, in <AutoSegment>, the ::computeOptimal() method is
short-circuited for pre-routed segments, the optimal axis position is
considered to be the one it is currently on (i.e. we trust the designer).
* New: In Katabatic, in <KatabaticEngine>, the ::loadGlobalRouting()
method now accept a map of excluded nets (same as Knik). This map is
the one of pre-routed nets.
* New: In Katabatic, in layer assignment, do not try to displace fixed
segments...
* New: In Katabatic, in <AutoSegment>, new flag SegUserDefined and related
methods to know if a segment comes from the global router (Knik) or
is pre-routed (supplied by the user).
* New: In Kite, In <BuildPowerRails>, support (exclusion) for pre-routed
nets.
* New: In Kite, In <GraphicKiteEngine> new menu entry for running the
router on pre-routed nets ("Detailed Pre-Route"), also integrated
in the all-on-one route command.
* New: In Kite, In KiteEngine, new method ::_initDataBase() that group
all the initialisation steps. It is a mix of calls between Knik and
Kite initializations which are intertwinneds (may have to devellop
a shared common base at a later point). It creates the Knik grid,
then the Katabatic grid, then load pre-routed wires and power rails
and protect isolated RoutingPads.
Add support for a map of pre-routed nets (to be excluded for
Knik calls).
The method "::run()" now uses function flags, firstly to know if
it is managing pre-routed wires or general purposes ones.
* New: In Kite, in <NegociateWindow>, the "::run()" methods has now two
modes. The normal one and the 'KtPreRoutedStage' that is for routing
pre-routed nets. When in pre-route stage, the wires are fixed at the
end of this step.
* New: In Kite, in <TrackElement> add decorator for AutoSegment
isUsedDefined().
* New: In Kite, in <TrackSegment>, the various ::canDogleg() methods
returns false for a pre-routed (user-defined segment).
* New: In Kite, in PyKiteEngine, added new method runNegociatePreRouted().
2014-06-21 13:16:47 -05:00
|
|
|
|
Support of RoutingGauge, part 2.
In Katabatic & Kite, remove all hard-coded values related to track pitches.
* New: In <Session>, add more convenience function to access RoutingGauge
characteristics.
* New: In <AutoSegment>, <AutoContact>, add support for the "depth spin",
that is, if the source/target contacts are going "top" or "down".
Used to compute the perpandicular pitch. Need a small modification
of the revalidation mechanism. The observers of <AutoSegment> are
notified when the spin changes.
* New: In <AutoSegment>, the getPPitch() method allow to compute the
"perpandicular pitch". For now it is simply the greatest from the
source perpandicular pitch and the target perpandicular pitch.
Make uses of the "depth spin".
* New: In <TrackElement>, <TrackSegment>, cache the perpandicular pitch.
Updated through the notification from the observable.
2014-05-19 10:58:38 -05:00
|
|
|
if (netType == Net::Type::POWER) {
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if (_vddiPadNetName.isEmpty()) {
|
2015-05-26 07:31:38 -05:00
|
|
|
_vddiPadNetName = net->getName();
|
|
|
|
|
_vddi = net;
|
Support of RoutingGauge, part 2.
In Katabatic & Kite, remove all hard-coded values related to track pitches.
* New: In <Session>, add more convenience function to access RoutingGauge
characteristics.
* New: In <AutoSegment>, <AutoContact>, add support for the "depth spin",
that is, if the source/target contacts are going "top" or "down".
Used to compute the perpandicular pitch. Need a small modification
of the revalidation mechanism. The observers of <AutoSegment> are
notified when the spin changes.
* New: In <AutoSegment>, the getPPitch() method allow to compute the
"perpandicular pitch". For now it is simply the greatest from the
source perpandicular pitch and the target perpandicular pitch.
Make uses of the "depth spin".
* New: In <TrackElement>, <TrackSegment>, cache the perpandicular pitch.
Updated through the notification from the observable.
2014-05-19 10:58:38 -05:00
|
|
|
} else {
|
|
|
|
|
cerr << Error("Second power supply net <%s> net at top block level will be ignored.\n"
|
|
|
|
|
" (will consider only <%s>)"
|
2015-05-26 07:31:38 -05:00
|
|
|
, getString(net ->getName()).c_str()
|
Support of RoutingGauge, part 2.
In Katabatic & Kite, remove all hard-coded values related to track pitches.
* New: In <Session>, add more convenience function to access RoutingGauge
characteristics.
* New: In <AutoSegment>, <AutoContact>, add support for the "depth spin",
that is, if the source/target contacts are going "top" or "down".
Used to compute the perpandicular pitch. Need a small modification
of the revalidation mechanism. The observers of <AutoSegment> are
notified when the spin changes.
* New: In <AutoSegment>, the getPPitch() method allow to compute the
"perpandicular pitch". For now it is simply the greatest from the
source perpandicular pitch and the target perpandicular pitch.
Make uses of the "depth spin".
* New: In <TrackElement>, <TrackSegment>, cache the perpandicular pitch.
Updated through the notification from the observable.
2014-05-19 10:58:38 -05:00
|
|
|
, getString(_vddi->getName()).c_str()
|
|
|
|
|
) << endl;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (netType == Net::Type::GROUND) {
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if (_vssiPadNetName.isEmpty()) {
|
2015-05-26 07:31:38 -05:00
|
|
|
_vssiPadNetName = net->getName();
|
|
|
|
|
_vssi = net;
|
Support of RoutingGauge, part 2.
In Katabatic & Kite, remove all hard-coded values related to track pitches.
* New: In <Session>, add more convenience function to access RoutingGauge
characteristics.
* New: In <AutoSegment>, <AutoContact>, add support for the "depth spin",
that is, if the source/target contacts are going "top" or "down".
Used to compute the perpandicular pitch. Need a small modification
of the revalidation mechanism. The observers of <AutoSegment> are
notified when the spin changes.
* New: In <AutoSegment>, the getPPitch() method allow to compute the
"perpandicular pitch". For now it is simply the greatest from the
source perpandicular pitch and the target perpandicular pitch.
Make uses of the "depth spin".
* New: In <TrackElement>, <TrackSegment>, cache the perpandicular pitch.
Updated through the notification from the observable.
2014-05-19 10:58:38 -05:00
|
|
|
} else {
|
|
|
|
|
cerr << Error("Second power ground net <%s> net at top block level will be ignored.\n"
|
|
|
|
|
" (will consider only <%s>)"
|
2015-05-26 07:31:38 -05:00
|
|
|
, getString(net ->getName()).c_str()
|
Support of RoutingGauge, part 2.
In Katabatic & Kite, remove all hard-coded values related to track pitches.
* New: In <Session>, add more convenience function to access RoutingGauge
characteristics.
* New: In <AutoSegment>, <AutoContact>, add support for the "depth spin",
that is, if the source/target contacts are going "top" or "down".
Used to compute the perpandicular pitch. Need a small modification
of the revalidation mechanism. The observers of <AutoSegment> are
notified when the spin changes.
* New: In <AutoSegment>, the getPPitch() method allow to compute the
"perpandicular pitch". For now it is simply the greatest from the
source perpandicular pitch and the target perpandicular pitch.
Make uses of the "depth spin".
* New: In <TrackElement>, <TrackSegment>, cache the perpandicular pitch.
Updated through the notification from the observable.
2014-05-19 10:58:38 -05:00
|
|
|
, getString(_vssi->getName()).c_str()
|
|
|
|
|
) << endl;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
Add management of fixed wires to Kite (for chip ClockTree)
* Change: In Hurricane, in Plug::setNet(), more informative error messages.
* Change: In Hurricane, In Segment, more informative error messages.
* Change: In Hurricane, In DeepNet, accessor for the Net occurrence.
* Bug: In Katabatic, in AutoSegment::create(), error message uses correct
variables (vertical was using horizontal)...
* Change: In Kite, in BuildPowerRails, already existing wiring in instances
is copied up as blockage. Uses blockage layer instead of true layer
(it was a bug).
* Change: In Kite, in BuildPreRouted, consider as manual global routing
nets with only default wiring (default size wire & contacts).
Non-default routing is flagged as fixed (with the NetRoutingState
property).
2014-08-15 12:26:49 -05:00
|
|
|
if (_vddi == NULL) cerr << Error("Missing <vdd> net at top block level." ) << endl;
|
Support of RoutingGauge, part 2.
In Katabatic & Kite, remove all hard-coded values related to track pitches.
* New: In <Session>, add more convenience function to access RoutingGauge
characteristics.
* New: In <AutoSegment>, <AutoContact>, add support for the "depth spin",
that is, if the source/target contacts are going "top" or "down".
Used to compute the perpandicular pitch. Need a small modification
of the revalidation mechanism. The observers of <AutoSegment> are
notified when the spin changes.
* New: In <AutoSegment>, the getPPitch() method allow to compute the
"perpandicular pitch". For now it is simply the greatest from the
source perpandicular pitch and the target perpandicular pitch.
Make uses of the "depth spin".
* New: In <TrackElement>, <TrackSegment>, cache the perpandicular pitch.
Updated through the notification from the observable.
2014-05-19 10:58:38 -05:00
|
|
|
else destroyRing( _vddi );
|
|
|
|
|
if (_vssi == NULL) cerr << Error("Missing <vss> net at top block level." ) << endl;
|
|
|
|
|
else destroyRing( _vssi );
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
}
|
|
|
|
|
|
Support of RoutingGauge, part 2.
In Katabatic & Kite, remove all hard-coded values related to track pitches.
* New: In <Session>, add more convenience function to access RoutingGauge
characteristics.
* New: In <AutoSegment>, <AutoContact>, add support for the "depth spin",
that is, if the source/target contacts are going "top" or "down".
Used to compute the perpandicular pitch. Need a small modification
of the revalidation mechanism. The observers of <AutoSegment> are
notified when the spin changes.
* New: In <AutoSegment>, the getPPitch() method allow to compute the
"perpandicular pitch". For now it is simply the greatest from the
source perpandicular pitch and the target perpandicular pitch.
Make uses of the "depth spin".
* New: In <TrackElement>, <TrackSegment>, cache the perpandicular pitch.
Updated through the notification from the observable.
2014-05-19 10:58:38 -05:00
|
|
|
if (_cko == NULL) cparanoid << Warning("No clock net at top level." ) << endl;
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
bool GlobalNetTable::guessGlobalNet ( const Name& name, Net* net )
|
|
|
|
|
{
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if (name == _vddePadNetName) {
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
cmess1 << " - Using <" << net->getName() << "> as corona (external:vdde) power net." << endl;
|
|
|
|
|
_vdde = net;
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if (name == _vddiPadNetName) {
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
cmess1 << " - Using <" << net->getName() << "> as core (internal:vddi) power net." << endl;
|
|
|
|
|
_vddi = net;
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if (name == _vssePadNetName) {
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
cmess1 << " - Using <" << net->getName() << "> as corona (external:vsse) ground net." << endl;
|
|
|
|
|
_vsse = net;
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if (name == _vssiPadNetName) {
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
cmess1 << " - Using <" << net->getName() << "> as core (internal:vssi) ground net." << endl;
|
|
|
|
|
_vssi = net;
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if (name == _ckiPadNetName) {
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
cmess1 << " - Using <" << net->getName() << "> as corona (external:cki) clock net." << endl;
|
|
|
|
|
_cki = net;
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if (name == _ckoPadNetName) {
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
cmess1 << " - Using <" << net->getName() << "> as core (internal:cko) clock net." << endl;
|
|
|
|
|
_cko = net;
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
|
|
|
|
|
if (NetRoutingExtension::isMixedPreRoute(_cko)) {
|
|
|
|
|
cmess1 << " (core clock net is already routed)" << endl;
|
|
|
|
|
_flags |= ClockIsRouted;
|
|
|
|
|
} else {
|
|
|
|
|
cmess1 << " (core clock net will be routed as an ordinary signal)" << endl;
|
|
|
|
|
}
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if (name == _ckPadNetName) {
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
cmess1 << " - Using <" << net->getName() << "> as external chip clock net." << endl;
|
|
|
|
|
_ck = net;
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return false;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Net* GlobalNetTable::getRootNet ( const Net* net, Path path ) const
|
|
|
|
|
{
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
ltrace(300) << " getRootNet:" << path << ":" << net << endl;
|
Correctly manage clock net isolateds from the main clock.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
given a path and a leaf net. This method is slow and must not be
used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
of clock nets was incomplete. The case of unrouted clock nets
that where not connected to the top core clock net, like the
one in the datapath registers was faulty. They were partly
recognized as unrouteds and partly as blockage generating a
routing deadlock: routage impossible due to blockage generated
from itself...
* New: In Stratus1, add a buildModel() utility function to automate
the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
2015-02-25 15:17:44 -06:00
|
|
|
|
Correction in plugins to support msxlib compatible pads.
* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
2014-09-13 10:45:30 -05:00
|
|
|
if (net == _blockage) return _blockage;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
2014-10-05 05:21:02 -05:00
|
|
|
if (_vdde and (net->getName() == _vdde->getName())) return _vdde;
|
|
|
|
|
if (_vsse and (net->getName() == _vsse->getName())) return _vsse;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
Correction in plugins to support msxlib compatible pads.
* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
2014-09-13 10:45:30 -05:00
|
|
|
if (net->getType() == Net::Type::POWER ) return _vddi;
|
|
|
|
|
if (net->getType() == Net::Type::GROUND) return _vssi;
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if (net->getType() != Net::Type::CLOCK ) {
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
// Track up, *only* for clocks.
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
const Net* upNet = net;
|
|
|
|
|
|
Correction in plugins to support msxlib compatible pads.
* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
2014-09-13 10:45:30 -05:00
|
|
|
if (not path.isEmpty()) {
|
Clocks in BLIF parser. In RSavePlugin, flags to select views to save.
* Bug: In CRL Core, in BlifParser, recognize clocks (Alliance patterns).
* Change: In Cumulus, in RSavePlugin, "kw" manage a new "views" to
specify which views must be saved. Physical by default, but sometimes
we need logical as well. If the design contains uniquified cells,
save the logical view.
In ClockTree, abort the clock tree building if the design has no
top level clock.
* Change: In Katabatic, in GCellTopology, adds 2G_5M1 configuration.
* Bug: Kite, in BuildPowerRails, if we are not in a chip the nets
composing the H-Tree must be protecteds be blockages.
2016-03-26 05:59:32 -05:00
|
|
|
DeepNet* deepClockNet = getTopCell()->getDeepNet( path, net );
|
|
|
|
|
if (deepClockNet) {
|
|
|
|
|
ltrace(300) << " Deep Clock Net:" << deepClockNet
|
|
|
|
|
<< " state:" << NetRoutingExtension::getFlags(deepClockNet) << endl;
|
|
|
|
|
|
|
|
|
|
return NetRoutingExtension::isFixed(deepClockNet) ? _blockage : NULL;
|
|
|
|
|
} else {
|
|
|
|
|
ltrace(300) << " Top Clock Net:" << net
|
|
|
|
|
<< " state:" << NetRoutingExtension::getFlags(net) << endl;
|
|
|
|
|
}
|
|
|
|
|
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
Path upPath = path;
|
|
|
|
|
Instance* instance = NULL;
|
|
|
|
|
Plug* plug = NULL;
|
|
|
|
|
|
|
|
|
|
while ( true ) {
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
ltrace(300) << " " << path << "+" << upNet << endl;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
Correction in plugins to support msxlib compatible pads.
* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
2014-09-13 10:45:30 -05:00
|
|
|
if (path.isEmpty()) break;
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
if ((upNet == NULL) or not upNet->isExternal()) return _blockage;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
|
|
|
|
instance = path.getTailInstance();
|
Correction in plugins to support msxlib compatible pads.
* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
2014-09-13 10:45:30 -05:00
|
|
|
plug = instance->getPlug(upNet);
|
|
|
|
|
if (plug == NULL) return NULL;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
|
|
|
|
upNet = plug->getNet();
|
|
|
|
|
path = path.getHeadPath();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
Integration of the latest Coloquinte in Etesian & misc modifs.
* New: In Bootstrap, in Builder & coriolisEnv.py support for RHEL7/SL7.
The sub-directory name is 'el7_64'.
In qt_setup() add QtSvg to list of Qt5 & Qt4 used libraries.
* New: In Hurricane, In Cell add a placeholder for flags. First use to
store whether the Nets have been transhierarchically flatteneds.
* New: In Hurricane, In NetRoutingState add an Unconnected flag for
more accurate diagnosis.
* New: Hurricane, in CellViewer add an entry menu for stress tests.
The script must be named "stressScript.py" in the cwd.
* Change: In CRL Core, in display.conf add a scaling parameter for the
display threhold of the layer. This way we can adapt to different
standard cells height.
* Change: In CRL Core, in ISPD05 bookshelf loader, use the pitch of the
cell gauge instead of a hard-wired 5.0.
* Change: In Cumulus, in ClockTreePlugin, add support for Etesian placer
and a new configuration parameter to choose between Mauka/Etesian.
* New: In Etesian, support for the latest Coloquinte.
Add feed insertion stage.
* Bug: In Kite, In BuildPowerRails, check that _ck is not NULL before
tring to access it's name...
* Change: In Kite, check if the Cell has it's Nets flattened before
doing it (or not).
2015-02-01 16:24:13 -06:00
|
|
|
ltrace(300) << " Check againts top clocks ck:" << ((_ck) ? _ck->getName() : "NULL")
|
|
|
|
|
<< " cki:" << ((_cki) ? _cki->getName() : "NULL")
|
|
|
|
|
<< " cko:" << ((_cko) ? _cko->getName() : "NULL")
|
|
|
|
|
<< endl;
|
|
|
|
|
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
if (_ck and (upNet->getName() == _ck->getName() )) return _ck;
|
|
|
|
|
if (_cki and (upNet->getName() == _cki->getName())) return _cki;
|
|
|
|
|
|
|
|
|
|
if (_cko) {
|
|
|
|
|
if (upNet->getName() == _cko->getName()) {
|
|
|
|
|
if (isCoreClockNetRouted(upNet)) return _cko;
|
|
|
|
|
}
|
|
|
|
|
}
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
Clocks in BLIF parser. In RSavePlugin, flags to select views to save.
* Bug: In CRL Core, in BlifParser, recognize clocks (Alliance patterns).
* Change: In Cumulus, in RSavePlugin, "kw" manage a new "views" to
specify which views must be saved. Physical by default, but sometimes
we need logical as well. If the design contains uniquified cells,
save the logical view.
In ClockTree, abort the clock tree building if the design has no
top level clock.
* Change: In Katabatic, in GCellTopology, adds 2G_5M1 configuration.
* Bug: Kite, in BuildPowerRails, if we are not in a chip the nets
composing the H-Tree must be protecteds be blockages.
2016-03-26 05:59:32 -05:00
|
|
|
return NetRoutingExtension::isFixed(upNet) ? _blockage : NULL;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
bool GlobalNetTable::isCoreClockNetRouted ( const Net* net ) const
|
|
|
|
|
{ return (net == _cko) and (_flags & ClockIsRouted); }
|
|
|
|
|
|
|
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
// -------------------------------------------------------------------
|
|
|
|
|
// Class : "::PowerRailsPlanes".
|
|
|
|
|
|
|
|
|
|
class PowerRailsPlanes {
|
2013-12-03 18:59:29 -06:00
|
|
|
public:
|
2010-03-09 09:24:55 -06:00
|
|
|
class Rails;
|
|
|
|
|
class Plane;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
class Rail {
|
|
|
|
|
public:
|
2013-12-03 18:59:29 -06:00
|
|
|
Rail ( Rails*, DbU::Unit axis, DbU::Unit width );
|
|
|
|
|
inline DbU::Unit getAxis () const;
|
|
|
|
|
inline DbU::Unit getWidth () const;
|
|
|
|
|
inline Rails* getRails () const;
|
|
|
|
|
inline RoutingPlane* getRoutingPlane () const;
|
|
|
|
|
inline unsigned int getDirection () const;
|
|
|
|
|
inline Net* getNet () const;
|
|
|
|
|
void merge ( DbU::Unit source, DbU::Unit target );
|
|
|
|
|
void doLayout ( const Layer* );
|
|
|
|
|
string _getString () const;
|
2010-03-09 09:24:55 -06:00
|
|
|
private:
|
|
|
|
|
Rails* _rails;
|
|
|
|
|
DbU::Unit _axis;
|
|
|
|
|
DbU::Unit _width;
|
|
|
|
|
list<Interval> _chunks;
|
|
|
|
|
};
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
private:
|
|
|
|
|
class RailCompare {
|
|
|
|
|
public:
|
|
|
|
|
bool operator() ( const Rail* lhs, const Rail* rhs );
|
|
|
|
|
};
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
class RailMatch : public unary_function<Rail*,bool> {
|
|
|
|
|
public:
|
|
|
|
|
inline RailMatch ( DbU::Unit axis, DbU::Unit width );
|
|
|
|
|
inline bool operator() ( const Rail* );
|
|
|
|
|
private:
|
|
|
|
|
DbU::Unit _axis;
|
|
|
|
|
DbU::Unit _width;
|
|
|
|
|
};
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
public:
|
2010-03-09 09:24:55 -06:00
|
|
|
class Rails {
|
|
|
|
|
public:
|
2013-12-03 18:59:29 -06:00
|
|
|
Rails ( Plane*, unsigned int direction, Net* );
|
|
|
|
|
~Rails ();
|
|
|
|
|
inline Plane* getPlane ();
|
|
|
|
|
inline RoutingPlane* getRoutingPlane ();
|
|
|
|
|
inline unsigned int getDirection () const;
|
|
|
|
|
inline Net* getNet () const;
|
|
|
|
|
void merge ( const Box& );
|
|
|
|
|
void doLayout ( const Layer* );
|
2010-03-09 09:24:55 -06:00
|
|
|
private:
|
2013-12-03 18:59:29 -06:00
|
|
|
Plane* _plane;
|
|
|
|
|
unsigned int _direction;
|
|
|
|
|
Net* _net;
|
|
|
|
|
vector<Rail*> _rails;
|
2010-03-09 09:24:55 -06:00
|
|
|
};
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
public:
|
2010-03-09 09:24:55 -06:00
|
|
|
class Plane {
|
|
|
|
|
public:
|
2013-12-03 18:59:29 -06:00
|
|
|
typedef map<Net*,Rails*,Net::CompareById> RailsMap;
|
|
|
|
|
public:
|
|
|
|
|
Plane ( const Layer*, RoutingPlane* );
|
|
|
|
|
~Plane ();
|
|
|
|
|
inline const Layer* getLayer () const;
|
|
|
|
|
inline RoutingPlane* getRoutingPlane ();
|
|
|
|
|
inline unsigned int getDirection () const;
|
|
|
|
|
inline unsigned int getPowerDirection () const;
|
|
|
|
|
void merge ( const Box&, Net* );
|
|
|
|
|
void doLayout ();
|
2010-03-09 09:24:55 -06:00
|
|
|
private:
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
const Layer* _layer;
|
|
|
|
|
RoutingPlane* _routingPlane;
|
2013-12-03 18:59:29 -06:00
|
|
|
RailsMap _horizontalRails;
|
|
|
|
|
RailsMap _verticalRails;
|
|
|
|
|
unsigned int _powerDirection;
|
2010-03-09 09:24:55 -06:00
|
|
|
};
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
public:
|
|
|
|
|
typedef map<const BasicLayer*,Plane*,BasicLayer::CompareByMask> PlanesMap;
|
2010-03-09 09:24:55 -06:00
|
|
|
public:
|
Add management of fixed wires to Kite (for chip ClockTree)
* Change: In Hurricane, in Plug::setNet(), more informative error messages.
* Change: In Hurricane, In Segment, more informative error messages.
* Change: In Hurricane, In DeepNet, accessor for the Net occurrence.
* Bug: In Katabatic, in AutoSegment::create(), error message uses correct
variables (vertical was using horizontal)...
* Change: In Kite, in BuildPowerRails, already existing wiring in instances
is copied up as blockage. Uses blockage layer instead of true layer
(it was a bug).
* Change: In Kite, in BuildPreRouted, consider as manual global routing
nets with only default wiring (default size wire & contacts).
Non-default routing is flagged as fixed (with the NetRoutingState
property).
2014-08-15 12:26:49 -05:00
|
|
|
PowerRailsPlanes ( KiteEngine* );
|
|
|
|
|
~PowerRailsPlanes ();
|
|
|
|
|
inline Net* getRootNet ( Net*, Path );
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
inline bool isCoreClockNetRouted ( const Net* ) const;
|
Add management of fixed wires to Kite (for chip ClockTree)
* Change: In Hurricane, in Plug::setNet(), more informative error messages.
* Change: In Hurricane, In Segment, more informative error messages.
* Change: In Hurricane, In DeepNet, accessor for the Net occurrence.
* Bug: In Katabatic, in AutoSegment::create(), error message uses correct
variables (vertical was using horizontal)...
* Change: In Kite, in BuildPowerRails, already existing wiring in instances
is copied up as blockage. Uses blockage layer instead of true layer
(it was a bug).
* Change: In Kite, in BuildPreRouted, consider as manual global routing
nets with only default wiring (default size wire & contacts).
Non-default routing is flagged as fixed (with the NetRoutingState
property).
2014-08-15 12:26:49 -05:00
|
|
|
bool hasPlane ( const BasicLayer* );
|
|
|
|
|
bool setActivePlane ( const BasicLayer* );
|
|
|
|
|
inline Plane* getActivePlane () const;
|
|
|
|
|
inline Plane* getActiveBlockagePlane () const;
|
|
|
|
|
void merge ( const Box&, Net* );
|
|
|
|
|
void doLayout ();
|
2010-03-09 09:24:55 -06:00
|
|
|
private:
|
2013-12-03 18:59:29 -06:00
|
|
|
KiteEngine* _kite;
|
|
|
|
|
GlobalNetTable _globalNets;
|
|
|
|
|
PlanesMap _planes;
|
|
|
|
|
Plane* _activePlane;
|
Add management of fixed wires to Kite (for chip ClockTree)
* Change: In Hurricane, in Plug::setNet(), more informative error messages.
* Change: In Hurricane, In Segment, more informative error messages.
* Change: In Hurricane, In DeepNet, accessor for the Net occurrence.
* Bug: In Katabatic, in AutoSegment::create(), error message uses correct
variables (vertical was using horizontal)...
* Change: In Kite, in BuildPowerRails, already existing wiring in instances
is copied up as blockage. Uses blockage layer instead of true layer
(it was a bug).
* Change: In Kite, in BuildPreRouted, consider as manual global routing
nets with only default wiring (default size wire & contacts).
Non-default routing is flagged as fixed (with the NetRoutingState
property).
2014-08-15 12:26:49 -05:00
|
|
|
Plane* _activeBlockagePlane;
|
2010-03-09 09:24:55 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PowerRailsPlanes::Rail::Rail ( Rails* rails, DbU::Unit axis, DbU::Unit width )
|
|
|
|
|
: _rails (rails)
|
|
|
|
|
, _axis (axis)
|
|
|
|
|
, _width (width)
|
|
|
|
|
, _chunks()
|
|
|
|
|
{
|
2013-12-03 18:59:29 -06:00
|
|
|
ltrace(300) << " new Rail "
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
<< " @" << DbU::getValueString(axis)
|
|
|
|
|
<< " " << getRoutingPlane()->getLayer()->getName()
|
|
|
|
|
<< " " << getRails()->getNet()
|
2013-12-03 18:59:29 -06:00
|
|
|
<< " " << ((getDirection()==KbHorizontal) ? "Horizontal" : "Vertical")<< endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
Add management of fixed wires to Kite (for chip ClockTree)
* Change: In Hurricane, in Plug::setNet(), more informative error messages.
* Change: In Hurricane, In Segment, more informative error messages.
* Change: In Hurricane, In DeepNet, accessor for the Net occurrence.
* Bug: In Katabatic, in AutoSegment::create(), error message uses correct
variables (vertical was using horizontal)...
* Change: In Kite, in BuildPowerRails, already existing wiring in instances
is copied up as blockage. Uses blockage layer instead of true layer
(it was a bug).
* Change: In Kite, in BuildPreRouted, consider as manual global routing
nets with only default wiring (default size wire & contacts).
Non-default routing is flagged as fixed (with the NetRoutingState
property).
2014-08-15 12:26:49 -05:00
|
|
|
inline DbU::Unit PowerRailsPlanes::Rail::getAxis () const { return _axis; }
|
|
|
|
|
inline DbU::Unit PowerRailsPlanes::Rail::getWidth () const { return _width; }
|
|
|
|
|
inline PowerRailsPlanes::Rails* PowerRailsPlanes::Rail::getRails () const { return _rails; }
|
|
|
|
|
inline RoutingPlane* PowerRailsPlanes::Rail::getRoutingPlane () const { return _rails->getRoutingPlane(); }
|
|
|
|
|
inline unsigned int PowerRailsPlanes::Rail::getDirection () const { return _rails->getDirection(); }
|
|
|
|
|
inline Net* PowerRailsPlanes::Rail::getNet () const { return _rails->getNet(); }
|
2010-03-09 09:24:55 -06:00
|
|
|
|
|
|
|
|
|
|
|
|
|
void PowerRailsPlanes::Rail::merge ( DbU::Unit source, DbU::Unit target )
|
|
|
|
|
{
|
2013-12-03 18:59:29 -06:00
|
|
|
Interval chunkToMerge ( source, target );
|
|
|
|
|
ltrace(300) << " Rail::merge() "
|
|
|
|
|
<< ((getDirection()==KbHorizontal) ? "Horizontal" : "Vertical")
|
|
|
|
|
<< " " << chunkToMerge << endl;
|
|
|
|
|
ltrace(300) << " | " << _getString() << endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
|
|
|
|
|
list<Interval>::iterator imerge = _chunks.end();
|
|
|
|
|
list<Interval>::iterator ichunk = _chunks.begin();
|
|
|
|
|
|
|
|
|
|
while ( ichunk != _chunks.end() ) {
|
2013-12-03 18:59:29 -06:00
|
|
|
if (imerge == _chunks.end()) {
|
|
|
|
|
if (chunkToMerge.getVMax() < (*ichunk).getVMin()) {
|
|
|
|
|
ltrace(300) << " | Insert before " << *ichunk << endl;
|
|
|
|
|
imerge = _chunks.insert( ichunk, chunkToMerge );
|
|
|
|
|
break;
|
|
|
|
|
}
|
2010-03-09 09:24:55 -06:00
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
if (chunkToMerge.intersect(*ichunk)) {
|
|
|
|
|
ltrace(300) << " | Merge with " << *ichunk << endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
imerge = ichunk;
|
2013-12-03 18:59:29 -06:00
|
|
|
(*imerge).merge( chunkToMerge );
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
2013-12-03 18:59:29 -06:00
|
|
|
} else {
|
|
|
|
|
if (chunkToMerge.getVMax() >= (*ichunk).getVMin()) {
|
|
|
|
|
(*imerge).merge( *ichunk );
|
|
|
|
|
ltrace(300) << " | Absorb (erase) " << *ichunk << endl;
|
|
|
|
|
ichunk = _chunks.erase( ichunk );
|
|
|
|
|
continue;
|
|
|
|
|
} else
|
|
|
|
|
break;
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
2013-12-03 18:59:29 -06:00
|
|
|
|
|
|
|
|
// if (chunkToMerge.intersect(*ichunk)) {
|
|
|
|
|
// if (imerge == _chunks.end()) {
|
|
|
|
|
// ltrace(300) << " | Merge with " << *ichunk << endl;
|
|
|
|
|
// imerge = ichunk;
|
|
|
|
|
// (*imerge).merge( chunkToMerge );
|
|
|
|
|
// } else {
|
|
|
|
|
// (*imerge).merge( *ichunk );
|
|
|
|
|
// ltrace(300) << " | Absorb (erase) " << *ichunk << endl;
|
|
|
|
|
// ichunk = _chunks.erase( ichunk );
|
|
|
|
|
// continue;
|
|
|
|
|
// }
|
|
|
|
|
// }
|
|
|
|
|
++ichunk;
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
if (imerge == _chunks.end()) {
|
|
|
|
|
_chunks.insert( ichunk, chunkToMerge );
|
|
|
|
|
ltrace(300) << " | Insert at end " << DbU::getValueString(_axis) << " " << chunkToMerge << endl;
|
|
|
|
|
ltrace(300) << " | " << _getString() << endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
void PowerRailsPlanes::Rail::doLayout ( const Layer* layer )
|
2010-03-09 09:24:55 -06:00
|
|
|
{
|
2013-12-03 18:59:29 -06:00
|
|
|
ltrace(300) << "Doing layout of rail: "
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
<< " " << layer->getName()
|
2013-12-03 18:59:29 -06:00
|
|
|
<< " " << ((getDirection()==KbHorizontal) ? "Horizontal" : "Vertical")
|
|
|
|
|
<< " @" << DbU::getValueString(_axis) << endl;
|
|
|
|
|
ltrace(300) << _getString() << endl;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
|
|
|
|
Net* net = getNet();
|
|
|
|
|
RoutingPlane* plane = getRoutingPlane();
|
|
|
|
|
Segment* segment = NULL;
|
2016-04-13 11:18:43 -05:00
|
|
|
//DbU::Unit delta = plane->getLayerGauge()->getPitch()
|
|
|
|
|
// - plane->getLayerGauge()->getHalfWireWidth()
|
|
|
|
|
// - DbU::fromLambda(0.1);
|
|
|
|
|
DbU::Unit delta = plane->getLayerGauge()->getObstacleDw() - DbU::fromLambda(0.1);
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
DbU::Unit extension = layer->getExtentionCap();
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
//DbU::Unit extension = Session::getExtentionCap();
|
2013-12-03 18:59:29 -06:00
|
|
|
//unsigned int type = plane->getLayerGauge()->getType();
|
2015-06-06 11:22:48 -05:00
|
|
|
const Box& coronaBb = plane->getKiteEngine()->getChipTools().getCoronaBb();
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
DbU::Unit axisMin = 0;
|
|
|
|
|
DbU::Unit axisMax = 0;
|
2010-03-09 09:24:55 -06:00
|
|
|
|
2015-06-06 11:22:48 -05:00
|
|
|
ltrace(300) << " delta:" << DbU::getValueString(delta)
|
|
|
|
|
<< " (pitch:" << DbU::getValueString(plane->getLayerGauge()->getPitch())
|
|
|
|
|
<< " , ww/2:" << DbU::getValueString(plane->getLayerGauge()->getHalfWireWidth())
|
|
|
|
|
<< ")" << endl;
|
|
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
// if ( type == Constant::PinOnly ) {
|
|
|
|
|
// ltrace(300) << " Layer is PinOnly." << endl;
|
|
|
|
|
// return;
|
|
|
|
|
// }
|
|
|
|
|
|
|
|
|
|
if ( getDirection() == KbHorizontal ) {
|
|
|
|
|
list<Interval>::iterator ichunk = _chunks.begin();
|
|
|
|
|
list<Interval>::iterator ichunknext = ichunk;
|
|
|
|
|
++ichunknext;
|
|
|
|
|
|
|
|
|
|
for ( ; ichunk != _chunks.end() ; ++ichunk, ++ichunknext ) {
|
|
|
|
|
|
|
|
|
|
if (ichunknext != _chunks.end()) {
|
|
|
|
|
if ((*ichunk).intersect(*ichunknext))
|
|
|
|
|
cerr << Error( "Overlaping consecutive chunks in %s %s Rail @%s:\n"
|
|
|
|
|
" %s"
|
|
|
|
|
, getString(layer->getName()).c_str()
|
|
|
|
|
, ((getDirection()==KbHorizontal) ? "Horizontal" : "Vertical")
|
|
|
|
|
, DbU::getValueString(_axis).c_str()
|
|
|
|
|
, _getString().c_str()
|
|
|
|
|
) << endl;
|
|
|
|
|
}
|
|
|
|
|
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
ltrace(300) << " chunk: [" << DbU::getValueString((*ichunk).getVMin())
|
|
|
|
|
<< ":" << DbU::getValueString((*ichunk).getVMax()) << "]" << endl;
|
|
|
|
|
|
|
|
|
|
segment = Horizontal::create ( net
|
|
|
|
|
, layer
|
|
|
|
|
, _axis
|
|
|
|
|
, _width
|
|
|
|
|
, (*ichunk).getVMin()+extension
|
|
|
|
|
, (*ichunk).getVMax()-extension
|
|
|
|
|
);
|
|
|
|
|
if ( segment and net->isExternal() )
|
|
|
|
|
NetExternalComponents::setExternal ( segment );
|
2010-03-09 09:24:55 -06:00
|
|
|
|
2015-06-06 11:22:48 -05:00
|
|
|
axisMin = _axis - _width/2;
|
|
|
|
|
axisMax = _axis + _width/2;
|
|
|
|
|
if (coronaBb.contains(segment->getBoundingBox())) {
|
|
|
|
|
axisMin -= delta;
|
|
|
|
|
axisMax += delta;
|
|
|
|
|
}
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
Track* track = plane->getTrackByPosition ( axisMin, Constant::Superior );
|
2013-12-03 18:59:29 -06:00
|
|
|
for ( ; track and (track->getAxis() <= axisMax) ; track = track->getNextTrack() ) {
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
TrackElement* element = TrackFixedSegment::create ( track, segment );
|
|
|
|
|
ltrace(300) << " Insert in " << track << "+" << element << endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
list<Interval>::iterator ichunk = _chunks.begin();
|
|
|
|
|
for ( ; ichunk != _chunks.end() ; ichunk++ ) {
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
ltrace(300) << " chunk: [" << DbU::getValueString((*ichunk).getVMin())
|
|
|
|
|
<< ":" << DbU::getValueString((*ichunk).getVMax()) << "]" << endl;
|
|
|
|
|
|
|
|
|
|
segment = Vertical::create ( net
|
|
|
|
|
, layer
|
|
|
|
|
, _axis
|
|
|
|
|
, _width
|
|
|
|
|
, (*ichunk).getVMin()+extension
|
|
|
|
|
, (*ichunk).getVMax()-extension
|
|
|
|
|
);
|
|
|
|
|
if ( segment and net->isExternal() )
|
|
|
|
|
NetExternalComponents::setExternal ( segment );
|
2010-03-09 09:24:55 -06:00
|
|
|
|
2015-06-06 11:22:48 -05:00
|
|
|
axisMin = _axis - _width/2;
|
|
|
|
|
axisMax = _axis + _width/2;
|
Added support for "same layer" dogleg. Big fix for pad routing.
* Change: In Knik, in Vertex, add a "blocked" flag to signal disabled
vertexes in the grid (must not be used by the global router).
Modificate the Graph::getVertex() method so that when a vertex
is geometrically queried, if is a blocked one, return a non-blocked
neighbor. This mechanism is introduced to, at last, prevent the
global router to go *under* the pad in case of a commplete chip.
* New: In Katabatic, in AutoSegment, a new state has been added: "reduced".
A reduced segment is in the same layer as it's perpandiculars.
To be reduced, a segments has to be connected on source & target to
AutoContactTurn, both of the perpandiculars must be of the same layer
(below or above) and it's length must not exceed one pitch in the
perpandicular direction.
To reduce an AutoSegment, call ::reduce() and to revert the state,
call ::raise(). Two associated predicates are associated:
::canReduce() and ::mustRaise().
Note: No two adjacent segments can be reduced at the same time.
* Bug: In Katabatic, in GCellTopology, add a new method ::doRp_AccessPad()
to connect to the pads. Create wiring, fixed and non managed by
Katabatic, to connect the pad connector layer to the lowest routing
layers (depth 1 & 2). The former implementation was sometimes leading
to gaps (sheared contact) that *must not* occurs during the building
stage.
Remark: This bug did put under the light the fact that the initial
wiring must be created without gaps. Gaps are closed by making doglegs
on contacts. But this mechanism could only work when the database if
fully initialised (the cache is up to date). Otherwise various problems
arise, in the canonization process for example.
* New: In Katabatic, in AutoContactTerminal::getNativeConstraintBox(),
when anchored on a RoutingPad, now take account the potential rotation
of the Path's transformation. Here again, for the chip's pads.
* New: In Kite, support for reduced AutoSegment. TrackSegment associateds
to reduced AutoSegment are *not* inserted into track to become
effectively invisibles. When a segment becomes reduced, a TrackEvent
is generated to remove it. Conversely when it is raised a RoutingEvent
is created/rescheduled to insert it. All this is mostly managed inside
the Session::revalidate() method.
* New: In Kite, in KiteEngine::createGlobalGraph(), in case of a chip,
mark all global routing vertexes (Knik) that are under a pad, as blockeds.
* Bug: In Cumulus, in PadsCorona.Side.getAxis(), inversion between X and
Y coordinate of the chip size. Did not show until a non-square chip
was routed (i.e. our MIPS R3000).
* Change: In Stratus1, in st_placement.py add the ClockBuffer class for
backward compatibility with the MIPS32 bench. Have to review this
functionnality coming from the deprecated placeAndroute.py.
In st_instance.py, no longer creates the Plug ring of a Net.
In my opinion it just clutter the display until the P&R is called.
Can re-enable later as an option (in Unicorn).
* Change: In Unicorn, in cgt.py, more reliable way of loading then running
user supplied scripts. Borrowed from alliance-checker-toolkit doChip.py .
2015-08-16 16:29:28 -05:00
|
|
|
//if (coronaBb.contains(segment->getBoundingBox())) {
|
2015-06-06 11:22:48 -05:00
|
|
|
axisMin -= delta;
|
|
|
|
|
axisMax += delta;
|
Added support for "same layer" dogleg. Big fix for pad routing.
* Change: In Knik, in Vertex, add a "blocked" flag to signal disabled
vertexes in the grid (must not be used by the global router).
Modificate the Graph::getVertex() method so that when a vertex
is geometrically queried, if is a blocked one, return a non-blocked
neighbor. This mechanism is introduced to, at last, prevent the
global router to go *under* the pad in case of a commplete chip.
* New: In Katabatic, in AutoSegment, a new state has been added: "reduced".
A reduced segment is in the same layer as it's perpandiculars.
To be reduced, a segments has to be connected on source & target to
AutoContactTurn, both of the perpandiculars must be of the same layer
(below or above) and it's length must not exceed one pitch in the
perpandicular direction.
To reduce an AutoSegment, call ::reduce() and to revert the state,
call ::raise(). Two associated predicates are associated:
::canReduce() and ::mustRaise().
Note: No two adjacent segments can be reduced at the same time.
* Bug: In Katabatic, in GCellTopology, add a new method ::doRp_AccessPad()
to connect to the pads. Create wiring, fixed and non managed by
Katabatic, to connect the pad connector layer to the lowest routing
layers (depth 1 & 2). The former implementation was sometimes leading
to gaps (sheared contact) that *must not* occurs during the building
stage.
Remark: This bug did put under the light the fact that the initial
wiring must be created without gaps. Gaps are closed by making doglegs
on contacts. But this mechanism could only work when the database if
fully initialised (the cache is up to date). Otherwise various problems
arise, in the canonization process for example.
* New: In Katabatic, in AutoContactTerminal::getNativeConstraintBox(),
when anchored on a RoutingPad, now take account the potential rotation
of the Path's transformation. Here again, for the chip's pads.
* New: In Kite, support for reduced AutoSegment. TrackSegment associateds
to reduced AutoSegment are *not* inserted into track to become
effectively invisibles. When a segment becomes reduced, a TrackEvent
is generated to remove it. Conversely when it is raised a RoutingEvent
is created/rescheduled to insert it. All this is mostly managed inside
the Session::revalidate() method.
* New: In Kite, in KiteEngine::createGlobalGraph(), in case of a chip,
mark all global routing vertexes (Knik) that are under a pad, as blockeds.
* Bug: In Cumulus, in PadsCorona.Side.getAxis(), inversion between X and
Y coordinate of the chip size. Did not show until a non-square chip
was routed (i.e. our MIPS R3000).
* Change: In Stratus1, in st_placement.py add the ClockBuffer class for
backward compatibility with the MIPS32 bench. Have to review this
functionnality coming from the deprecated placeAndroute.py.
In st_instance.py, no longer creates the Plug ring of a Net.
In my opinion it just clutter the display until the P&R is called.
Can re-enable later as an option (in Unicorn).
* Change: In Unicorn, in cgt.py, more reliable way of loading then running
user supplied scripts. Borrowed from alliance-checker-toolkit doChip.py .
2015-08-16 16:29:28 -05:00
|
|
|
//}
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
|
2016-04-13 11:18:43 -05:00
|
|
|
ltrace(300) << " axisMin:" << DbU::getValueString(axisMin)
|
|
|
|
|
<< " axisMax:" << DbU::getValueString(axisMax) << endl;
|
|
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
Track* track = plane->getTrackByPosition ( axisMin, Constant::Superior );
|
2013-12-03 18:59:29 -06:00
|
|
|
for ( ; track and (track->getAxis() <= axisMax) ; track = track->getNextTrack() ) {
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
TrackElement* element = TrackFixedSegment::create ( track, segment );
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
ltrace(300) << " Insert in " << track
|
|
|
|
|
<< "+" << element
|
|
|
|
|
<< " " << (net->isExternal() ? "external" : "internal")
|
|
|
|
|
<< endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
string PowerRailsPlanes::Rail::_getString () const
|
|
|
|
|
{
|
|
|
|
|
ostringstream os;
|
|
|
|
|
|
|
|
|
|
os << "<Rail " << ((getDirection()==KbHorizontal) ? "Horizontal" : "Vertical")
|
2015-06-06 11:22:48 -05:00
|
|
|
<< " @" << DbU::getValueString(_axis) << " "
|
|
|
|
|
<< " w:" << DbU::getValueString(_width) << " ";
|
2013-12-03 18:59:29 -06:00
|
|
|
list<Interval>::const_iterator ichunk = _chunks.begin();
|
|
|
|
|
for ( ; ichunk != _chunks.end() ; ++ichunk ) {
|
|
|
|
|
if (ichunk != _chunks.begin()) os << " ";
|
|
|
|
|
os << "[" << DbU::getValueString((*ichunk).getVMin())
|
|
|
|
|
<< " " << DbU::getValueString((*ichunk).getVMax()) << "]";
|
|
|
|
|
}
|
|
|
|
|
os << ">";
|
|
|
|
|
return os.str();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
inline bool PowerRailsPlanes::RailCompare::operator() ( const Rail* lhs, const Rail* rhs )
|
|
|
|
|
{
|
|
|
|
|
if ( lhs->getAxis () < rhs->getAxis () ) return true;
|
|
|
|
|
if ( lhs->getWidth() < rhs->getWidth() ) return true;
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
inline PowerRailsPlanes::RailMatch::RailMatch ( DbU::Unit axis, DbU::Unit width )
|
|
|
|
|
: _axis(axis)
|
|
|
|
|
, _width(width)
|
|
|
|
|
{ }
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
inline bool PowerRailsPlanes::RailMatch::operator() ( const Rail* rail )
|
|
|
|
|
{ return (rail->getAxis() == _axis) and (rail->getWidth() == _width); }
|
|
|
|
|
|
|
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
PowerRailsPlanes::Rails::Rails ( PowerRailsPlanes::Plane* plane , unsigned int direction , Net* net )
|
|
|
|
|
: _plane (plane)
|
|
|
|
|
, _direction (direction)
|
|
|
|
|
, _net (net)
|
|
|
|
|
, _rails ()
|
2010-03-09 09:24:55 -06:00
|
|
|
{
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
ltrace(300) << " new Rails @"
|
|
|
|
|
<< " " << getRoutingPlane()->getLayer()->getName()
|
|
|
|
|
<< " " << net
|
2013-12-03 18:59:29 -06:00
|
|
|
<< " " << ((getDirection()==KbHorizontal) ? "Horizontal": "Vertical") << endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PowerRailsPlanes::Rails::~Rails ()
|
|
|
|
|
{
|
|
|
|
|
while ( not _rails.empty() ) {
|
|
|
|
|
delete (*_rails.begin());
|
|
|
|
|
_rails.erase ( _rails.begin() );
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
inline PowerRailsPlanes::Plane* PowerRailsPlanes::Rails::getPlane () { return _plane; }
|
|
|
|
|
inline RoutingPlane* PowerRailsPlanes::Rails::getRoutingPlane () { return getPlane()->getRoutingPlane(); }
|
|
|
|
|
inline unsigned int PowerRailsPlanes::Rails::getDirection () const { return _direction; }
|
|
|
|
|
inline Net* PowerRailsPlanes::Rails::getNet () const { return _net; }
|
2010-03-09 09:24:55 -06:00
|
|
|
|
|
|
|
|
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
void PowerRailsPlanes::Rails::merge ( const Box& bb )
|
2010-03-09 09:24:55 -06:00
|
|
|
{
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
DbU::Unit axis;
|
|
|
|
|
DbU::Unit width;
|
|
|
|
|
DbU::Unit sourceU;
|
|
|
|
|
DbU::Unit targetU;
|
|
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
if (getDirection() == KbHorizontal) {
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
axis = bb.getYCenter();
|
|
|
|
|
width = bb.getHeight();
|
|
|
|
|
sourceU = bb.getXMin();
|
|
|
|
|
targetU = bb.getXMax();
|
|
|
|
|
} else {
|
|
|
|
|
axis = bb.getXCenter();
|
|
|
|
|
width = bb.getWidth();
|
|
|
|
|
sourceU = bb.getYMin();
|
|
|
|
|
targetU = bb.getYMax();
|
|
|
|
|
}
|
|
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
vector<Rail*>::iterator irail = find_if ( _rails.begin(), _rails.end(), RailMatch(axis,width) );
|
|
|
|
|
|
|
|
|
|
Rail* rail = NULL;
|
|
|
|
|
if ( irail == _rails.end() ) {
|
|
|
|
|
rail = new Rail(this,axis,width);
|
|
|
|
|
_rails.push_back ( rail );
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
stable_sort ( _rails.begin(), _rails.end(), RailCompare() );
|
2010-03-09 09:24:55 -06:00
|
|
|
} else {
|
|
|
|
|
rail = *irail;
|
|
|
|
|
}
|
|
|
|
|
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
rail->merge ( sourceU, targetU );
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
void PowerRailsPlanes::Rails::doLayout ( const Layer* layer )
|
2010-03-09 09:24:55 -06:00
|
|
|
{
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
ltrace(300) << "Doing layout of rails: " << layer->getName()
|
2013-12-03 18:59:29 -06:00
|
|
|
<< " " << ((_direction==KbHorizontal) ? "Horizontal" : "Vertical")
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
<< " " << _net->getName() << endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
|
|
|
|
|
for ( size_t irail=0 ; irail<_rails.size() ; irail++ )
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
_rails[irail]->doLayout ( layer );
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
PowerRailsPlanes::Plane::Plane ( const Layer* layer, RoutingPlane* routingPlane )
|
2010-03-09 09:24:55 -06:00
|
|
|
: _layer (layer)
|
|
|
|
|
, _routingPlane (routingPlane)
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
, _horizontalRails ()
|
|
|
|
|
, _verticalRails ()
|
2013-12-03 18:59:29 -06:00
|
|
|
, _powerDirection (routingPlane->getDirection())
|
2010-03-09 09:24:55 -06:00
|
|
|
{
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
ltrace(300) << "New Plane " << _layer->getName() << " " << _routingPlane << endl;
|
2013-12-03 18:59:29 -06:00
|
|
|
|
|
|
|
|
// Hard-coded SxLib gauge.
|
|
|
|
|
if (_routingPlane->getDepth() == 0) _powerDirection = KbHorizontal;
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PowerRailsPlanes::Plane::~Plane ()
|
|
|
|
|
{
|
2013-12-03 18:59:29 -06:00
|
|
|
RailsMap::iterator irail = _horizontalRails.begin();
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
for ( ; irail != _horizontalRails.end() ; ++irail ) {
|
|
|
|
|
delete (*irail).second;
|
|
|
|
|
}
|
|
|
|
|
irail = _verticalRails.begin();
|
|
|
|
|
for ( ; irail != _verticalRails.end() ; ++irail ) {
|
|
|
|
|
delete (*irail).second;
|
|
|
|
|
}
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
inline const Layer* PowerRailsPlanes::Plane::getLayer () const { return _layer; }
|
|
|
|
|
inline RoutingPlane* PowerRailsPlanes::Plane::getRoutingPlane () { return _routingPlane; }
|
|
|
|
|
inline unsigned int PowerRailsPlanes::Plane::getDirection () const { return _routingPlane->getDirection(); }
|
|
|
|
|
inline unsigned int PowerRailsPlanes::Plane::getPowerDirection () const { return _powerDirection; }
|
2010-03-09 09:24:55 -06:00
|
|
|
|
|
|
|
|
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
void PowerRailsPlanes::Plane::merge ( const Box& bb, Net* net )
|
2010-03-09 09:24:55 -06:00
|
|
|
{
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
Rails* rails = NULL;
|
|
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
ltrace(300) << " Plane::merge() " << net->getName() << " " << bb << endl;
|
|
|
|
|
|
|
|
|
|
unsigned int direction = getDirection();
|
|
|
|
|
if ( (net->getType() == Net::Type::POWER) or (net->getType() == Net::Type::GROUND) )
|
|
|
|
|
direction = getPowerDirection();
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
if (direction == KbHorizontal) {
|
|
|
|
|
RailsMap::iterator irails = _horizontalRails.find(net);
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
if ( irails == _horizontalRails.end() ) {
|
2013-12-03 18:59:29 -06:00
|
|
|
rails = new Rails(this,KbHorizontal,net);
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
_horizontalRails.insert ( make_pair(net,rails) );
|
|
|
|
|
} else
|
|
|
|
|
rails = (*irails).second;
|
|
|
|
|
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
rails->merge ( bb );
|
2010-03-09 09:24:55 -06:00
|
|
|
} else {
|
2013-12-03 18:59:29 -06:00
|
|
|
RailsMap::iterator irails = _verticalRails.find(net);
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
if ( irails == _verticalRails.end() ) {
|
2013-12-03 18:59:29 -06:00
|
|
|
rails = new Rails(this,KbVertical,net);
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
_verticalRails.insert ( make_pair(net,rails) );
|
|
|
|
|
} else
|
|
|
|
|
rails = (*irails).second;
|
|
|
|
|
|
2012-01-03 11:04:00 -06:00
|
|
|
ltrace(300) << " Vertical Merging" << endl;
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
rails->merge ( bb );
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
void PowerRailsPlanes::Plane::doLayout ()
|
2010-03-09 09:24:55 -06:00
|
|
|
{
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
ltrace(300) << "Doing layout of plane: " << _layer->getName() << endl;
|
|
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
RailsMap::iterator irails = _horizontalRails.begin();
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
for ( ; irails != _horizontalRails.end() ; ++irails ) {
|
|
|
|
|
(*irails).second->doLayout(_layer);
|
|
|
|
|
}
|
|
|
|
|
irails = _verticalRails.begin();
|
|
|
|
|
for ( ; irails != _verticalRails.end() ; ++irails ) {
|
|
|
|
|
(*irails).second->doLayout(_layer);
|
|
|
|
|
}
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PowerRailsPlanes::PowerRailsPlanes ( KiteEngine* kite )
|
Add management of fixed wires to Kite (for chip ClockTree)
* Change: In Hurricane, in Plug::setNet(), more informative error messages.
* Change: In Hurricane, In Segment, more informative error messages.
* Change: In Hurricane, In DeepNet, accessor for the Net occurrence.
* Bug: In Katabatic, in AutoSegment::create(), error message uses correct
variables (vertical was using horizontal)...
* Change: In Kite, in BuildPowerRails, already existing wiring in instances
is copied up as blockage. Uses blockage layer instead of true layer
(it was a bug).
* Change: In Kite, in BuildPreRouted, consider as manual global routing
nets with only default wiring (default size wire & contacts).
Non-default routing is flagged as fixed (with the NetRoutingState
property).
2014-08-15 12:26:49 -05:00
|
|
|
: _kite (kite)
|
|
|
|
|
, _globalNets (kite)
|
|
|
|
|
, _planes ()
|
|
|
|
|
, _activePlane (NULL)
|
|
|
|
|
, _activeBlockagePlane(NULL)
|
2010-03-09 09:24:55 -06:00
|
|
|
{
|
2013-12-03 18:59:29 -06:00
|
|
|
_globalNets.setBlockage( kite->getBlockageNet() );
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
Technology* technology = DataBase::getDB()->getTechnology();
|
|
|
|
|
RoutingGauge* rg = _kite->getConfiguration()->getRoutingGauge();
|
|
|
|
|
|
2015-05-26 07:31:38 -05:00
|
|
|
for( Layer* layer : technology->getLayers() ) {
|
|
|
|
|
RegularLayer* regular = dynamic_cast<RegularLayer*>(layer);
|
2010-03-09 09:24:55 -06:00
|
|
|
if ( not regular
|
|
|
|
|
or (regular->getBasicLayer()->getMaterial() != BasicLayer::Material::metal) ) continue;
|
|
|
|
|
|
|
|
|
|
RoutingLayerGauge* lg = rg->getLayerGauge(regular);
|
|
|
|
|
if ( not lg ) continue;
|
|
|
|
|
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
ltrace(300) << "Gauge: [" << lg->getDepth() << "] " << lg << endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
|
|
|
|
|
RoutingPlane* rp = _kite->getRoutingPlaneByIndex(lg->getDepth());
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
ltrace(300) << "Plane:" << rp << endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
_planes.insert( make_pair(regular->getBasicLayer(),new Plane(regular,rp)) );
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
|
ExtensionCap support and source/target terminal flags in Katabatic & Kite.
Placement management:
* Change: In <metis>, always disable the hMetis support regardless of
it being detected or not as the placer is still unable manage the
final bin contents.
Routing gauge management:
* Bug: In CRL Core, <vsclib/alliance.conf>, set the correct pitches and
size for the routing layers and the cell gauge.
* Change: In Katabatic & Kite, extract the correct extension cap for each
routing layer from the layers characteristics (cache then in
Katabatic::Configuration).
* Change: In Katabatic, <AutoSegment>, create segment with the wire width
defined in the gauge. For AutoSegment created on already existing
Segment from the global routing, adjust the width.
* Change: In Katabatic, <AutoSegment>, more accurate information about how
a segment is connected to terminal via source and/or target.
The flag SegStrongTerminal is splitted into SegSourceTerminal and
SegSourceTarget (but still used as a mask). So now we can know by
which end an AutoSegment is connected to a terminal.
* Change: In Katabatic, ::doRp_Access(), create constraint freeing segments
not only when HSmall but also when VSmall (more critical for <vsclib>).
Otherwise we may see AutoSegments with incompatible source/target
constraints.
* Change: In Kite, BuildPowerRails, do not create blockage on PinOnly
layers *but* still create power rails planes. This is a temporary
workaround for <vsclib> where the METAL1 blockages overlaps the
terminals (it was fine for Nero, but they shouldn't for Kite).
* Change: In Kite, <RoutingEvent>, if a TrackSegment is overconstrained,
directly bybass it's slackening state to DataNegociate::Slacken.
Also rename the flag "_canHandleConstraints" to "_overConstrained",
seems clearer to me.
Miscellaneous:
* Change: In CRL Core, <Utilities>, add a "pass-though" capability on the
mstream to temporarily make them print everything.
2014-05-25 08:00:35 -05:00
|
|
|
if (lg->getType() == Constant::PinOnly) continue;
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
const BasicLayer* blockageLayer = regular->getBasicLayer()->getBlockageLayer();
|
2013-12-03 18:59:29 -06:00
|
|
|
if (not blockageLayer) continue;
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
_planes.insert( make_pair(blockageLayer,new Plane(blockageLayer,rp)) );
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PowerRailsPlanes::~PowerRailsPlanes ()
|
|
|
|
|
{
|
|
|
|
|
while ( not _planes.empty() ) {
|
|
|
|
|
delete _planes.begin()->second;
|
|
|
|
|
_planes.erase ( _planes.begin() );
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
|
|
|
|
inline Net* PowerRailsPlanes::getRootNet ( Net* net, Path path )
|
|
|
|
|
{ return _globalNets.getRootNet(net,path); }
|
|
|
|
|
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
|
|
|
|
|
inline bool PowerRailsPlanes::isCoreClockNetRouted ( const Net* net ) const
|
|
|
|
|
{ return _globalNets.isCoreClockNetRouted(net); }
|
|
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
|
|
|
|
|
bool PowerRailsPlanes::hasPlane ( const BasicLayer* layer )
|
|
|
|
|
{ return (_planes.find(layer) != _planes.end()); }
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
bool PowerRailsPlanes::setActivePlane ( const BasicLayer* layer )
|
|
|
|
|
{
|
2013-12-03 18:59:29 -06:00
|
|
|
PlanesMap::iterator iplane = _planes.find(layer);
|
Add management of fixed wires to Kite (for chip ClockTree)
* Change: In Hurricane, in Plug::setNet(), more informative error messages.
* Change: In Hurricane, In Segment, more informative error messages.
* Change: In Hurricane, In DeepNet, accessor for the Net occurrence.
* Bug: In Katabatic, in AutoSegment::create(), error message uses correct
variables (vertical was using horizontal)...
* Change: In Kite, in BuildPowerRails, already existing wiring in instances
is copied up as blockage. Uses blockage layer instead of true layer
(it was a bug).
* Change: In Kite, in BuildPreRouted, consider as manual global routing
nets with only default wiring (default size wire & contacts).
Non-default routing is flagged as fixed (with the NetRoutingState
property).
2014-08-15 12:26:49 -05:00
|
|
|
if (iplane == _planes.end()) return false;
|
|
|
|
|
|
|
|
|
|
_activePlane = iplane->second;
|
|
|
|
|
_activeBlockagePlane = NULL;
|
|
|
|
|
if (layer->getMaterial() != BasicLayer::Material::blockage) {
|
|
|
|
|
BasicLayer* blockageLayer = layer->getBlockageLayer();
|
|
|
|
|
PlanesMap::iterator ibplane = _planes.find(blockageLayer);
|
|
|
|
|
if (ibplane != _planes.end())
|
|
|
|
|
_activeBlockagePlane = ibplane->second;
|
|
|
|
|
}
|
2010-03-09 09:24:55 -06:00
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
inline PowerRailsPlanes::Plane* PowerRailsPlanes::getActivePlane () const
|
|
|
|
|
{ return _activePlane; }
|
|
|
|
|
|
|
|
|
|
|
Add management of fixed wires to Kite (for chip ClockTree)
* Change: In Hurricane, in Plug::setNet(), more informative error messages.
* Change: In Hurricane, In Segment, more informative error messages.
* Change: In Hurricane, In DeepNet, accessor for the Net occurrence.
* Bug: In Katabatic, in AutoSegment::create(), error message uses correct
variables (vertical was using horizontal)...
* Change: In Kite, in BuildPowerRails, already existing wiring in instances
is copied up as blockage. Uses blockage layer instead of true layer
(it was a bug).
* Change: In Kite, in BuildPreRouted, consider as manual global routing
nets with only default wiring (default size wire & contacts).
Non-default routing is flagged as fixed (with the NetRoutingState
property).
2014-08-15 12:26:49 -05:00
|
|
|
inline PowerRailsPlanes::Plane* PowerRailsPlanes::getActiveBlockagePlane () const
|
|
|
|
|
{ return _activeBlockagePlane; }
|
|
|
|
|
|
|
|
|
|
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
void PowerRailsPlanes::merge ( const Box& bb, Net* net )
|
2010-03-09 09:24:55 -06:00
|
|
|
{
|
Add management of fixed wires to Kite (for chip ClockTree)
* Change: In Hurricane, in Plug::setNet(), more informative error messages.
* Change: In Hurricane, In Segment, more informative error messages.
* Change: In Hurricane, In DeepNet, accessor for the Net occurrence.
* Bug: In Katabatic, in AutoSegment::create(), error message uses correct
variables (vertical was using horizontal)...
* Change: In Kite, in BuildPowerRails, already existing wiring in instances
is copied up as blockage. Uses blockage layer instead of true layer
(it was a bug).
* Change: In Kite, in BuildPreRouted, consider as manual global routing
nets with only default wiring (default size wire & contacts).
Non-default routing is flagged as fixed (with the NetRoutingState
property).
2014-08-15 12:26:49 -05:00
|
|
|
if (not _activePlane) return;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
Add management of fixed wires to Kite (for chip ClockTree)
* Change: In Hurricane, in Plug::setNet(), more informative error messages.
* Change: In Hurricane, In Segment, more informative error messages.
* Change: In Hurricane, In DeepNet, accessor for the Net occurrence.
* Bug: In Katabatic, in AutoSegment::create(), error message uses correct
variables (vertical was using horizontal)...
* Change: In Kite, in BuildPowerRails, already existing wiring in instances
is copied up as blockage. Uses blockage layer instead of true layer
(it was a bug).
* Change: In Kite, in BuildPreRouted, consider as manual global routing
nets with only default wiring (default size wire & contacts).
Non-default routing is flagged as fixed (with the NetRoutingState
property).
2014-08-15 12:26:49 -05:00
|
|
|
Net* topGlobalNet = _globalNets.getRootNet( net, Path() );
|
|
|
|
|
if (topGlobalNet == NULL) {
|
2012-01-03 11:04:00 -06:00
|
|
|
ltrace(300) << "Not a global net: " << net << endl;
|
|
|
|
|
return;
|
|
|
|
|
}
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
Add management of fixed wires to Kite (for chip ClockTree)
* Change: In Hurricane, in Plug::setNet(), more informative error messages.
* Change: In Hurricane, In Segment, more informative error messages.
* Change: In Hurricane, In DeepNet, accessor for the Net occurrence.
* Bug: In Katabatic, in AutoSegment::create(), error message uses correct
variables (vertical was using horizontal)...
* Change: In Kite, in BuildPowerRails, already existing wiring in instances
is copied up as blockage. Uses blockage layer instead of true layer
(it was a bug).
* Change: In Kite, in BuildPreRouted, consider as manual global routing
nets with only default wiring (default size wire & contacts).
Non-default routing is flagged as fixed (with the NetRoutingState
property).
2014-08-15 12:26:49 -05:00
|
|
|
if ( (topGlobalNet == _globalNets.getBlockage()) and (_activeBlockagePlane != NULL) )
|
|
|
|
|
_activeBlockagePlane->merge( bb, topGlobalNet );
|
|
|
|
|
else
|
|
|
|
|
_activePlane->merge( bb, topGlobalNet );
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void PowerRailsPlanes::doLayout ()
|
|
|
|
|
{
|
2013-12-03 18:59:29 -06:00
|
|
|
PlanesMap::iterator iplane = _planes.begin();
|
2010-03-09 09:24:55 -06:00
|
|
|
for ( ; iplane != _planes.end() ; iplane++ )
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
iplane->second->doLayout ();
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
// -------------------------------------------------------------------
|
|
|
|
|
// Class : "::QueryPowerRails".
|
|
|
|
|
|
|
|
|
|
class QueryPowerRails : public Query {
|
|
|
|
|
public:
|
2010-08-18 15:25:02 -05:00
|
|
|
QueryPowerRails ( KiteEngine* );
|
2010-03-09 09:24:55 -06:00
|
|
|
virtual bool hasGoCallback () const;
|
|
|
|
|
virtual void setBasicLayer ( const BasicLayer* );
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
virtual bool hasBasicLayer ( const BasicLayer* );
|
2010-03-09 09:24:55 -06:00
|
|
|
virtual void goCallback ( Go* );
|
|
|
|
|
virtual void rubberCallback ( Rubber* );
|
|
|
|
|
virtual void extensionGoCallback ( Go* );
|
|
|
|
|
virtual void masterCellCallback ();
|
|
|
|
|
void addToPowerRail ( const Go* go
|
|
|
|
|
, const BasicLayer* basicLayer
|
|
|
|
|
, const Box& area
|
|
|
|
|
, const Transformation& transformation
|
|
|
|
|
);
|
* ./Kite:
- New: In BuildPowerRails, special processing for the power ring segments.
The "diagonal" of vias at each corner is causing a misbehavior of the
routing algorithm (due to fully saturated GCells in one direction).
As a temporary fix, extend the segments so they form a "square corner".
(problem arise on "d_in_i(22)").
- New: In RoutingEvent::_processNegociate, disable the "isForcedToHint()"
feature. No noticeable loss of quality or speed.
- New: In TrackElement/TrackSegment, wraps the AutoSegment parent's mechanism.
Allows to gets the DataNegociate of either the segment or it's parent.
- New: State::solveFullBlockages(), dedicated method to solves the case when
all the allowed tracks of a segment are blocked, tries to moves up
local segments and to break-up global ones.
- New: RoutingEventLoop, a more sophisticated way to detect looping.
Maintain a dynamic histogram of the last N (default 10) segments routeds,
with the count of how many times they have occurred. If that count
exeed 40, we *may* be facing a loop.
- Change: In State::conflictSolve1, implement new policy. The global segments
no more can be broken by local ones. The idea behind is that breaking
a global on the request of a local will only produce more cluttering
in the GCell. Globals must be keep straigth pass through, especially
inside near-saturated GCells. Globals breaking however can occurs at
another global's request.
- Change: In TrackCost, implement the new policy about locals segments that
cannot break globals segments. The sorting class now accept flags to
modulate the sorting function. Two options avalaibles: IgnoreAxisWeigth
(to uses for strap segments) and DiscardGlobals (to uses with locals).
- Change: In TrackCost, the "distance to fixed" have now an upper bound of
50 lambdas (no need to be greater because it means it's outside the
begin & en GCells). Take account not only of fixed segment, but also
of placed segments which makes bound.
- Bug: In Track::_check(), while calling each individual TrackSegment check,
uses it as the *first* argument of the "or", otherwise it may not be
called.
- Bug: In ProtectRoutingPad, loop over segment Collections while modificating
it was producing non-deterministic results. The fact that a collection
must be not modificated while beeing iterated is becoming a more and more
painful problem.
2010-12-30 12:42:17 -06:00
|
|
|
void ringAddToPowerRails ();
|
2010-03-09 09:24:55 -06:00
|
|
|
virtual void doQuery ();
|
|
|
|
|
inline void doLayout ();
|
|
|
|
|
inline unsigned int getGoMatchCount () const;
|
|
|
|
|
private:
|
* ./Kite:
- New: In BuildPowerRails, special processing for the power ring segments.
The "diagonal" of vias at each corner is causing a misbehavior of the
routing algorithm (due to fully saturated GCells in one direction).
As a temporary fix, extend the segments so they form a "square corner".
(problem arise on "d_in_i(22)").
- New: In RoutingEvent::_processNegociate, disable the "isForcedToHint()"
feature. No noticeable loss of quality or speed.
- New: In TrackElement/TrackSegment, wraps the AutoSegment parent's mechanism.
Allows to gets the DataNegociate of either the segment or it's parent.
- New: State::solveFullBlockages(), dedicated method to solves the case when
all the allowed tracks of a segment are blocked, tries to moves up
local segments and to break-up global ones.
- New: RoutingEventLoop, a more sophisticated way to detect looping.
Maintain a dynamic histogram of the last N (default 10) segments routeds,
with the count of how many times they have occurred. If that count
exeed 40, we *may* be facing a loop.
- Change: In State::conflictSolve1, implement new policy. The global segments
no more can be broken by local ones. The idea behind is that breaking
a global on the request of a local will only produce more cluttering
in the GCell. Globals must be keep straigth pass through, especially
inside near-saturated GCells. Globals breaking however can occurs at
another global's request.
- Change: In TrackCost, implement the new policy about locals segments that
cannot break globals segments. The sorting class now accept flags to
modulate the sorting function. Two options avalaibles: IgnoreAxisWeigth
(to uses for strap segments) and DiscardGlobals (to uses with locals).
- Change: In TrackCost, the "distance to fixed" have now an upper bound of
50 lambdas (no need to be greater because it means it's outside the
begin & en GCells). Take account not only of fixed segment, but also
of placed segments which makes bound.
- Bug: In Track::_check(), while calling each individual TrackSegment check,
uses it as the *first* argument of the "or", otherwise it may not be
called.
- Bug: In ProtectRoutingPad, loop over segment Collections while modificating
it was producing non-deterministic results. The fact that a collection
must be not modificated while beeing iterated is becoming a more and more
painful problem.
2010-12-30 12:42:17 -06:00
|
|
|
AllianceFramework* _framework;
|
|
|
|
|
KiteEngine* _kite;
|
|
|
|
|
RoutingGauge* _routingGauge;
|
|
|
|
|
const ChipTools& _chipTools;
|
|
|
|
|
PowerRailsPlanes _powerRailsPlanes;
|
|
|
|
|
bool _isBlockagePlane;
|
|
|
|
|
vector<const Segment*> _hRingSegments;
|
|
|
|
|
vector<const Segment*> _vRingSegments;
|
|
|
|
|
unsigned int _goMatchCount;
|
2010-03-09 09:24:55 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
QueryPowerRails::QueryPowerRails ( KiteEngine* kite )
|
|
|
|
|
: Query ()
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
, _framework (AllianceFramework::get())
|
2010-03-09 09:24:55 -06:00
|
|
|
, _kite (kite)
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
, _routingGauge (kite->getConfiguration()->getRoutingGauge())
|
* ./Kite:
- New: In BuildPowerRails, special processing for the power ring segments.
The "diagonal" of vias at each corner is causing a misbehavior of the
routing algorithm (due to fully saturated GCells in one direction).
As a temporary fix, extend the segments so they form a "square corner".
(problem arise on "d_in_i(22)").
- New: In RoutingEvent::_processNegociate, disable the "isForcedToHint()"
feature. No noticeable loss of quality or speed.
- New: In TrackElement/TrackSegment, wraps the AutoSegment parent's mechanism.
Allows to gets the DataNegociate of either the segment or it's parent.
- New: State::solveFullBlockages(), dedicated method to solves the case when
all the allowed tracks of a segment are blocked, tries to moves up
local segments and to break-up global ones.
- New: RoutingEventLoop, a more sophisticated way to detect looping.
Maintain a dynamic histogram of the last N (default 10) segments routeds,
with the count of how many times they have occurred. If that count
exeed 40, we *may* be facing a loop.
- Change: In State::conflictSolve1, implement new policy. The global segments
no more can be broken by local ones. The idea behind is that breaking
a global on the request of a local will only produce more cluttering
in the GCell. Globals must be keep straigth pass through, especially
inside near-saturated GCells. Globals breaking however can occurs at
another global's request.
- Change: In TrackCost, implement the new policy about locals segments that
cannot break globals segments. The sorting class now accept flags to
modulate the sorting function. Two options avalaibles: IgnoreAxisWeigth
(to uses for strap segments) and DiscardGlobals (to uses with locals).
- Change: In TrackCost, the "distance to fixed" have now an upper bound of
50 lambdas (no need to be greater because it means it's outside the
begin & en GCells). Take account not only of fixed segment, but also
of placed segments which makes bound.
- Bug: In Track::_check(), while calling each individual TrackSegment check,
uses it as the *first* argument of the "or", otherwise it may not be
called.
- Bug: In ProtectRoutingPad, loop over segment Collections while modificating
it was producing non-deterministic results. The fact that a collection
must be not modificated while beeing iterated is becoming a more and more
painful problem.
2010-12-30 12:42:17 -06:00
|
|
|
, _chipTools (kite->getChipTools())
|
2010-03-09 09:24:55 -06:00
|
|
|
, _powerRailsPlanes(kite)
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
, _isBlockagePlane (false)
|
* ./Kite:
- New: In BuildPowerRails, special processing for the power ring segments.
The "diagonal" of vias at each corner is causing a misbehavior of the
routing algorithm (due to fully saturated GCells in one direction).
As a temporary fix, extend the segments so they form a "square corner".
(problem arise on "d_in_i(22)").
- New: In RoutingEvent::_processNegociate, disable the "isForcedToHint()"
feature. No noticeable loss of quality or speed.
- New: In TrackElement/TrackSegment, wraps the AutoSegment parent's mechanism.
Allows to gets the DataNegociate of either the segment or it's parent.
- New: State::solveFullBlockages(), dedicated method to solves the case when
all the allowed tracks of a segment are blocked, tries to moves up
local segments and to break-up global ones.
- New: RoutingEventLoop, a more sophisticated way to detect looping.
Maintain a dynamic histogram of the last N (default 10) segments routeds,
with the count of how many times they have occurred. If that count
exeed 40, we *may* be facing a loop.
- Change: In State::conflictSolve1, implement new policy. The global segments
no more can be broken by local ones. The idea behind is that breaking
a global on the request of a local will only produce more cluttering
in the GCell. Globals must be keep straigth pass through, especially
inside near-saturated GCells. Globals breaking however can occurs at
another global's request.
- Change: In TrackCost, implement the new policy about locals segments that
cannot break globals segments. The sorting class now accept flags to
modulate the sorting function. Two options avalaibles: IgnoreAxisWeigth
(to uses for strap segments) and DiscardGlobals (to uses with locals).
- Change: In TrackCost, the "distance to fixed" have now an upper bound of
50 lambdas (no need to be greater because it means it's outside the
begin & en GCells). Take account not only of fixed segment, but also
of placed segments which makes bound.
- Bug: In Track::_check(), while calling each individual TrackSegment check,
uses it as the *first* argument of the "or", otherwise it may not be
called.
- Bug: In ProtectRoutingPad, loop over segment Collections while modificating
it was producing non-deterministic results. The fact that a collection
must be not modificated while beeing iterated is becoming a more and more
painful problem.
2010-12-30 12:42:17 -06:00
|
|
|
, _hRingSegments ()
|
|
|
|
|
, _vRingSegments ()
|
2010-03-09 09:24:55 -06:00
|
|
|
, _goMatchCount (0)
|
|
|
|
|
{
|
|
|
|
|
setCell ( kite->getCell() );
|
|
|
|
|
setArea ( kite->getCell()->getBoundingBox() );
|
|
|
|
|
setBasicLayer ( NULL );
|
|
|
|
|
setFilter ( Query::DoTerminalCells|Query::DoComponents );
|
Improved UpdateSession & exception catching. Start of RoutingGauge implem.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
2014-04-20 12:25:08 -05:00
|
|
|
|
|
|
|
|
cmess1 << " o Building power rails." << endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
inline unsigned int QueryPowerRails::getGoMatchCount () const
|
|
|
|
|
{ return _goMatchCount; }
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
inline void QueryPowerRails::doLayout ()
|
|
|
|
|
{ return _powerRailsPlanes.doLayout(); }
|
|
|
|
|
|
|
|
|
|
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
bool QueryPowerRails::hasBasicLayer ( const BasicLayer* basicLayer )
|
|
|
|
|
{ return _powerRailsPlanes.hasPlane ( basicLayer ); }
|
|
|
|
|
|
|
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
void QueryPowerRails::setBasicLayer ( const BasicLayer* basicLayer )
|
|
|
|
|
{
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
_isBlockagePlane = (basicLayer) and (basicLayer->getMaterial() == BasicLayer::Material::blockage);
|
2010-03-09 09:24:55 -06:00
|
|
|
_powerRailsPlanes.setActivePlane ( basicLayer );
|
|
|
|
|
Query::setBasicLayer ( basicLayer );
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void QueryPowerRails::doQuery ()
|
|
|
|
|
{
|
2013-12-03 18:59:29 -06:00
|
|
|
PowerRailsPlanes::Plane* activePlane = _powerRailsPlanes.getActivePlane();
|
|
|
|
|
|
|
|
|
|
if (not activePlane) return;
|
|
|
|
|
|
|
|
|
|
cmess1 << " - PowerRails in " << activePlane->getLayer()->getName() << " ..." << endl;
|
|
|
|
|
Query::doQuery();
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void QueryPowerRails::masterCellCallback ()
|
|
|
|
|
{ }
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
bool QueryPowerRails::hasGoCallback () const
|
|
|
|
|
{ return true; }
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void QueryPowerRails::goCallback ( Go* go )
|
|
|
|
|
{
|
2013-12-03 18:59:29 -06:00
|
|
|
//ltrace(80) << "QueryPowerRails::goCallback() " << go->getId() << ":" << go
|
|
|
|
|
// << " " << getPath().getName() << endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
addToPowerRail ( go, getBasicLayer(), getArea(), getTransformation() );
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void QueryPowerRails::addToPowerRail ( const Go* go
|
|
|
|
|
, const BasicLayer* basicLayer
|
|
|
|
|
, const Box& area
|
|
|
|
|
, const Transformation& transformation
|
|
|
|
|
)
|
|
|
|
|
{
|
|
|
|
|
const Component* component = dynamic_cast<const Component*>(go);
|
|
|
|
|
if ( component ) {
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
if ( _framework->isPad(getMasterCell())
|
2015-06-06 11:22:48 -05:00
|
|
|
and ( (_routingGauge->getLayerDepth(component->getLayer()) < 2)
|
|
|
|
|
or (component->getLayer()->getBasicLayers().getFirst()->getMaterial() != BasicLayer::Material::blockage) ) )
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
return;
|
|
|
|
|
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
Net* rootNet = _kite->getBlockageNet();
|
|
|
|
|
if (not _isBlockagePlane) {
|
|
|
|
|
rootNet = _powerRailsPlanes.getRootNet(component->getNet(),getPath());
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#if 0
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
Net* rootNet = NULL;
|
|
|
|
|
if ( not _isBlockagePlane )
|
|
|
|
|
rootNet = _powerRailsPlanes.getRootNet(component->getNet(),getPath());
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
else {
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
rootNet = _kite->getBlockageNet();
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
Bug fixes for MOSIS SCMOS_DEEP support.
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
2014-09-21 09:44:37 -05:00
|
|
|
if ( rootNet == NULL ) {
|
|
|
|
|
ltrace(300) << " rootNet is NULL, not taken into account." << endl;
|
|
|
|
|
return;
|
|
|
|
|
}
|
2010-03-09 09:24:55 -06:00
|
|
|
|
Correction in plugins to support msxlib compatible pads.
* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
2014-09-13 10:45:30 -05:00
|
|
|
ltrace(300) << " rootNet " << rootNet << " (" << rootNet->isClock() << ") "
|
|
|
|
|
<< go->getCell() << " (" << go->getCell()->isTerminal() << ")" << endl;
|
|
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
const Segment* segment = dynamic_cast<const Segment*>(component);
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
if ( segment != NULL ) {
|
|
|
|
|
_goMatchCount++;
|
|
|
|
|
ltrace(300) << " Merging PowerRail element: " << segment << endl;
|
2010-03-09 09:24:55 -06:00
|
|
|
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
Box bb = segment->getBoundingBox ( basicLayer );
|
* ./Kite:
- New: In BuildPowerRails, special processing for the power ring segments.
The "diagonal" of vias at each corner is causing a misbehavior of the
routing algorithm (due to fully saturated GCells in one direction).
As a temporary fix, extend the segments so they form a "square corner".
(problem arise on "d_in_i(22)").
- New: In RoutingEvent::_processNegociate, disable the "isForcedToHint()"
feature. No noticeable loss of quality or speed.
- New: In TrackElement/TrackSegment, wraps the AutoSegment parent's mechanism.
Allows to gets the DataNegociate of either the segment or it's parent.
- New: State::solveFullBlockages(), dedicated method to solves the case when
all the allowed tracks of a segment are blocked, tries to moves up
local segments and to break-up global ones.
- New: RoutingEventLoop, a more sophisticated way to detect looping.
Maintain a dynamic histogram of the last N (default 10) segments routeds,
with the count of how many times they have occurred. If that count
exeed 40, we *may* be facing a loop.
- Change: In State::conflictSolve1, implement new policy. The global segments
no more can be broken by local ones. The idea behind is that breaking
a global on the request of a local will only produce more cluttering
in the GCell. Globals must be keep straigth pass through, especially
inside near-saturated GCells. Globals breaking however can occurs at
another global's request.
- Change: In TrackCost, implement the new policy about locals segments that
cannot break globals segments. The sorting class now accept flags to
modulate the sorting function. Two options avalaibles: IgnoreAxisWeigth
(to uses for strap segments) and DiscardGlobals (to uses with locals).
- Change: In TrackCost, the "distance to fixed" have now an upper bound of
50 lambdas (no need to be greater because it means it's outside the
begin & en GCells). Take account not only of fixed segment, but also
of placed segments which makes bound.
- Bug: In Track::_check(), while calling each individual TrackSegment check,
uses it as the *first* argument of the "or", otherwise it may not be
called.
- Bug: In ProtectRoutingPad, loop over segment Collections while modificating
it was producing non-deterministic results. The fact that a collection
must be not modificated while beeing iterated is becoming a more and more
painful problem.
2010-12-30 12:42:17 -06:00
|
|
|
|
|
|
|
|
unsigned int depth = _routingGauge->getLayerDepth ( segment->getLayer() );
|
|
|
|
|
|
|
|
|
|
if ( _chipTools.isChip()
|
2015-06-06 11:22:48 -05:00
|
|
|
and ((depth == 2) or (depth == 3))
|
|
|
|
|
and (segment->getWidth () == _chipTools.getPadPowerWidth())
|
|
|
|
|
and (segment->getLength() > _chipTools.getPadWidth())
|
|
|
|
|
and (_kite->getChipTools().getCorona().contains(bb)) ) {
|
* ./Kite:
- New: In BuildPowerRails, special processing for the power ring segments.
The "diagonal" of vias at each corner is causing a misbehavior of the
routing algorithm (due to fully saturated GCells in one direction).
As a temporary fix, extend the segments so they form a "square corner".
(problem arise on "d_in_i(22)").
- New: In RoutingEvent::_processNegociate, disable the "isForcedToHint()"
feature. No noticeable loss of quality or speed.
- New: In TrackElement/TrackSegment, wraps the AutoSegment parent's mechanism.
Allows to gets the DataNegociate of either the segment or it's parent.
- New: State::solveFullBlockages(), dedicated method to solves the case when
all the allowed tracks of a segment are blocked, tries to moves up
local segments and to break-up global ones.
- New: RoutingEventLoop, a more sophisticated way to detect looping.
Maintain a dynamic histogram of the last N (default 10) segments routeds,
with the count of how many times they have occurred. If that count
exeed 40, we *may* be facing a loop.
- Change: In State::conflictSolve1, implement new policy. The global segments
no more can be broken by local ones. The idea behind is that breaking
a global on the request of a local will only produce more cluttering
in the GCell. Globals must be keep straigth pass through, especially
inside near-saturated GCells. Globals breaking however can occurs at
another global's request.
- Change: In TrackCost, implement the new policy about locals segments that
cannot break globals segments. The sorting class now accept flags to
modulate the sorting function. Two options avalaibles: IgnoreAxisWeigth
(to uses for strap segments) and DiscardGlobals (to uses with locals).
- Change: In TrackCost, the "distance to fixed" have now an upper bound of
50 lambdas (no need to be greater because it means it's outside the
begin & en GCells). Take account not only of fixed segment, but also
of placed segments which makes bound.
- Bug: In Track::_check(), while calling each individual TrackSegment check,
uses it as the *first* argument of the "or", otherwise it may not be
called.
- Bug: In ProtectRoutingPad, loop over segment Collections while modificating
it was producing non-deterministic results. The fact that a collection
must be not modificated while beeing iterated is becoming a more and more
painful problem.
2010-12-30 12:42:17 -06:00
|
|
|
switch ( depth ) {
|
|
|
|
|
case 2: _vRingSegments.push_back ( segment ); break; // M3 V.
|
|
|
|
|
case 3: _hRingSegments.push_back ( segment ); break; // M4 H.
|
|
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
transformation.applyOn ( bb );
|
2010-03-09 09:24:55 -06:00
|
|
|
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
_powerRailsPlanes.merge ( bb, rootNet );
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
} else {
|
|
|
|
|
const Contact* contact = dynamic_cast<const Contact*>(component);
|
|
|
|
|
if ( contact != NULL ) {
|
|
|
|
|
_goMatchCount++;
|
|
|
|
|
|
|
|
|
|
Box bb = contact->getBoundingBox ( basicLayer );
|
|
|
|
|
transformation.applyOn ( bb );
|
|
|
|
|
|
2012-01-03 11:04:00 -06:00
|
|
|
ltrace(300) << " Merging PowerRail element: " << contact << " bb:" << bb
|
|
|
|
|
<< " " << basicLayer << endl;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
_powerRailsPlanes.merge ( bb, rootNet );
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
}
|
|
|
|
|
}
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
* ./Kite:
- New: In BuildPowerRails, special processing for the power ring segments.
The "diagonal" of vias at each corner is causing a misbehavior of the
routing algorithm (due to fully saturated GCells in one direction).
As a temporary fix, extend the segments so they form a "square corner".
(problem arise on "d_in_i(22)").
- New: In RoutingEvent::_processNegociate, disable the "isForcedToHint()"
feature. No noticeable loss of quality or speed.
- New: In TrackElement/TrackSegment, wraps the AutoSegment parent's mechanism.
Allows to gets the DataNegociate of either the segment or it's parent.
- New: State::solveFullBlockages(), dedicated method to solves the case when
all the allowed tracks of a segment are blocked, tries to moves up
local segments and to break-up global ones.
- New: RoutingEventLoop, a more sophisticated way to detect looping.
Maintain a dynamic histogram of the last N (default 10) segments routeds,
with the count of how many times they have occurred. If that count
exeed 40, we *may* be facing a loop.
- Change: In State::conflictSolve1, implement new policy. The global segments
no more can be broken by local ones. The idea behind is that breaking
a global on the request of a local will only produce more cluttering
in the GCell. Globals must be keep straigth pass through, especially
inside near-saturated GCells. Globals breaking however can occurs at
another global's request.
- Change: In TrackCost, implement the new policy about locals segments that
cannot break globals segments. The sorting class now accept flags to
modulate the sorting function. Two options avalaibles: IgnoreAxisWeigth
(to uses for strap segments) and DiscardGlobals (to uses with locals).
- Change: In TrackCost, the "distance to fixed" have now an upper bound of
50 lambdas (no need to be greater because it means it's outside the
begin & en GCells). Take account not only of fixed segment, but also
of placed segments which makes bound.
- Bug: In Track::_check(), while calling each individual TrackSegment check,
uses it as the *first* argument of the "or", otherwise it may not be
called.
- Bug: In ProtectRoutingPad, loop over segment Collections while modificating
it was producing non-deterministic results. The fact that a collection
must be not modificated while beeing iterated is becoming a more and more
painful problem.
2010-12-30 12:42:17 -06:00
|
|
|
void QueryPowerRails::ringAddToPowerRails ()
|
|
|
|
|
{
|
|
|
|
|
if ( not _hRingSegments.empty() ) {
|
|
|
|
|
const RegularLayer* layer = dynamic_cast<const RegularLayer*>(_routingGauge->getRoutingLayer(3));
|
|
|
|
|
setBasicLayer ( layer->getBasicLayer() );
|
|
|
|
|
|
|
|
|
|
DbU::Unit xmin = DbU::Max;
|
|
|
|
|
DbU::Unit xmax = DbU::Min;
|
|
|
|
|
vector<Box> boxes;
|
|
|
|
|
|
|
|
|
|
for ( size_t i=0 ; i<_hRingSegments.size() ; ++i ) {
|
|
|
|
|
boxes.push_back ( _hRingSegments[i]->getBoundingBox() );
|
|
|
|
|
xmin = std::min ( xmin, boxes.back().getXMin() );
|
|
|
|
|
xmax = std::max ( xmax, boxes.back().getXMax() );
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for ( size_t i=0 ; i<_hRingSegments.size() ; ++i ) {
|
|
|
|
|
_powerRailsPlanes.merge ( Box(xmin,boxes[i].getYMin(),xmax,boxes[i].getYMax())
|
|
|
|
|
, _powerRailsPlanes.getRootNet(_hRingSegments[i]->getNet(),Path()) );
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if ( not _vRingSegments.empty() ) {
|
|
|
|
|
const RegularLayer* layer = dynamic_cast<const RegularLayer*>(_routingGauge->getRoutingLayer(2));
|
|
|
|
|
setBasicLayer ( layer->getBasicLayer() );
|
|
|
|
|
|
|
|
|
|
DbU::Unit ymin = DbU::Max;
|
|
|
|
|
DbU::Unit ymax = DbU::Min;
|
|
|
|
|
vector<Box> boxes;
|
|
|
|
|
|
|
|
|
|
for ( size_t i=0 ; i<_vRingSegments.size() ; ++i ) {
|
|
|
|
|
boxes.push_back ( _vRingSegments[i]->getBoundingBox() );
|
|
|
|
|
ymin = std::min ( ymin, boxes.back().getYMin() );
|
|
|
|
|
ymax = std::max ( ymax, boxes.back().getYMax() );
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for ( size_t i=0 ; i<_vRingSegments.size() ; ++i ) {
|
|
|
|
|
_powerRailsPlanes.merge ( Box(boxes[i].getXMin(),ymin,boxes[i].getXMax(),ymax)
|
|
|
|
|
, _powerRailsPlanes.getRootNet(_vRingSegments[i]->getNet(),Path()) );
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
void QueryPowerRails::rubberCallback ( Rubber* )
|
|
|
|
|
{ }
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void QueryPowerRails::extensionGoCallback ( Go* )
|
|
|
|
|
{ }
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
} // End of anonymous namespace.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
namespace Kite {
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
using Hurricane::DataBase;
|
|
|
|
|
using Hurricane::Technology;
|
|
|
|
|
using Hurricane::BasicLayer;
|
|
|
|
|
using Hurricane::ForEachIterator;
|
Add NetRoutingState (Property) on Nets to tell Kite what to do.
* New: In Katabatic, add the ability to decorate some (i.e. few) nets
with a state that indicate to Katabatic & Kite what to do with it.
The possible states are:
1. Fixed : all the wire are in fixed positions. The router cannot
move them and account them as obstacles.
2. ManualGlobalRoute : a user-defined topology is supplied. The
wires still have to be detailed route in "Detailed Pre-Route"
but will be skipped for the global routing and fixed for the
general Detailed route.
3. AutomaticGlobalRoute : ordinary nets, to be global routed then
detail routed.
4. Excluded : do not try to global or detail route thoses nets.
5. MixedPreRoute : mask combining Fixed and ManualGlobalRoute.
Not all nets have this property, only those that needs a special
processing.
To ease the access to the state, it is nested inside a
PrivateProperty in the net (NetRoutingProperty), with an extension
access class (NetRoutingExtension).
* New: In Kite, take account of NetRoutingState. Pointers to the
net's states are strored inside an internal map for faster access.
The property is *not* deleted when Kite is destroyed. The property
will remains until the Net itself is destroyed.
As a consequence, the lists that where passed to high level
function are removed as the information can now be accessed directly
through the net NetRoutingProperty.
* New: In Unicorn, in CgtMain, comply with the update interface.
* New: In documentation, update the User's Guide to explain the Pre-routed
step of Kite.
2014-07-02 07:36:58 -05:00
|
|
|
using Katabatic::NetRoutingState;
|
2010-03-09 09:24:55 -06:00
|
|
|
|
|
|
|
|
|
|
|
|
|
void KiteEngine::buildPowerRails ()
|
|
|
|
|
{
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
//DebugSession::open( 300 );
|
|
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
if (not _blockageNet) {
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
_blockageNet = getCell()->getNet("blockagenet");
|
New relation for slaved ABs. Do *not* delete blockage nets.
* Change: In Hurricane, in DataBase::CellDepths() the recursion stop
criterion must be Cell::isLeaf() and not Cell::isTerminal() as
the second one can be used to hide some levels of hierarchy,
and we want all of them in a blob.
* New: In Hurricane, in Cell, create a new Slaveds relation to keep
track of all the Cells with a slaved abutment box. This work is
incomplete as we do not manage the behavior in case of merge or
Cell destruction or slaving Cells with aready slaveds ones.
Modify Cell::setAbutmentBox() to work in both autonomous and
slaved mode.
* New: In Hurricane, in Net, add a new type of Net: BLOCKAGE this
avoid us to be dependant on the framework pattern recognition.
(change propagated to the Python support)
* New: In CRL Core, in the various drivers, recognize blockage nets
as such and set their type accordingly.
* Change: In CRL, in Toolbox::deleteEmptyNets(), preserve blockage
Nets. This was the cause of crashs in Kite::BuildPowerRails() as
we where trying to use a deleted blockage net...
* Bug: In Hurricane, in NetAlias, do not write NetAlias as a name
but as a type. They were not read back and moreover staying in
the JSON parser stack.
2016-03-30 10:47:00 -05:00
|
|
|
if (not _blockageNet) {
|
2013-12-03 18:59:29 -06:00
|
|
|
_blockageNet = Net::create( getCell(), "blockagenet" );
|
New relation for slaved ABs. Do *not* delete blockage nets.
* Change: In Hurricane, in DataBase::CellDepths() the recursion stop
criterion must be Cell::isLeaf() and not Cell::isTerminal() as
the second one can be used to hide some levels of hierarchy,
and we want all of them in a blob.
* New: In Hurricane, in Cell, create a new Slaveds relation to keep
track of all the Cells with a slaved abutment box. This work is
incomplete as we do not manage the behavior in case of merge or
Cell destruction or slaving Cells with aready slaveds ones.
Modify Cell::setAbutmentBox() to work in both autonomous and
slaved mode.
* New: In Hurricane, in Net, add a new type of Net: BLOCKAGE this
avoid us to be dependant on the framework pattern recognition.
(change propagated to the Python support)
* New: In CRL Core, in the various drivers, recognize blockage nets
as such and set their type accordingly.
* Change: In CRL, in Toolbox::deleteEmptyNets(), preserve blockage
Nets. This was the cause of crashs in Kite::BuildPowerRails() as
we where trying to use a deleted blockage net...
* Bug: In Hurricane, in NetAlias, do not write NetAlias as a name
but as a type. They were not read back and moreover staying in
the JSON parser stack.
2016-03-30 10:47:00 -05:00
|
|
|
_blockageNet->setType( Net::Type::BLOCKAGE );
|
|
|
|
|
}
|
Add NetRoutingState (Property) on Nets to tell Kite what to do.
* New: In Katabatic, add the ability to decorate some (i.e. few) nets
with a state that indicate to Katabatic & Kite what to do with it.
The possible states are:
1. Fixed : all the wire are in fixed positions. The router cannot
move them and account them as obstacles.
2. ManualGlobalRoute : a user-defined topology is supplied. The
wires still have to be detailed route in "Detailed Pre-Route"
but will be skipped for the global routing and fixed for the
general Detailed route.
3. AutomaticGlobalRoute : ordinary nets, to be global routed then
detail routed.
4. Excluded : do not try to global or detail route thoses nets.
5. MixedPreRoute : mask combining Fixed and ManualGlobalRoute.
Not all nets have this property, only those that needs a special
processing.
To ease the access to the state, it is nested inside a
PrivateProperty in the net (NetRoutingProperty), with an extension
access class (NetRoutingExtension).
* New: In Kite, take account of NetRoutingState. Pointers to the
net's states are strored inside an internal map for faster access.
The property is *not* deleted when Kite is destroyed. The property
will remains until the Net itself is destroyed.
As a consequence, the lists that where passed to high level
function are removed as the information can now be accessed directly
through the net NetRoutingProperty.
* New: In Unicorn, in CgtMain, comply with the update interface.
* New: In documentation, update the User's Guide to explain the Pre-routed
step of Kite.
2014-07-02 07:36:58 -05:00
|
|
|
|
|
|
|
|
NetRoutingState* state = getRoutingState( _blockageNet, Katabatic::KbCreate );
|
|
|
|
|
state->setFlags( NetRoutingState::Fixed );
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
}
|
|
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
QueryPowerRails query ( this );
|
|
|
|
|
Technology* technology = DataBase::getDB()->getTechnology();
|
|
|
|
|
|
2015-05-26 07:31:38 -05:00
|
|
|
for( BasicLayer* layer : technology->getBasicLayers() ) {
|
|
|
|
|
if ( (layer->getMaterial() != BasicLayer::Material::metal)
|
|
|
|
|
and (layer->getMaterial() != BasicLayer::Material::blockage) )
|
* ./kite:
- Change: Propagate renaming "obstacle" -> "blockage".
- Bug/Change: In Configuration, the value of the extensionCap was too big
(1.5 lambda), reduce to 0.5 lambda. This is a problem, the extension
should be coupled to the layer as it is not the same for each METAL.
- Bug: When using TrackElement, always uses the virtual "->isFixed()" method
instead of trying to access to "->base()->isFixed()" as the base may be
NULL in case of blockage/fixed segment.
- Change: Merge PowerRails & Blockage trans-hierarchical construction (into
PowerRails). All blockages are groupeds under "blockagenet".
Allows to remove TrackBlockage & BuildBlockages.
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
ring power segments around the core must completly saturate the edges
in their segment direction. This is to prevent the global router to
use paths under the power/ground ring (may generate unsolvable configs).
- Change: In KiteEngine::annotateGloblalGraph(), when routing a full chip,
distinguish three areas: the core (65%), the corona (90%) and the pads
(100%). Capacities on the edges are sets accordingly.
- Change: In RoutingEvent, introduce an alternative algorithm for
conflictSolve1, FindPath which try to deduce the breakpoints from a
truly explorated path. Unfortunatly this gives worst results than the
Cs1Candidates method. The why should be investigated as it's a critical
point in the algorithm.
- Change: In Manipulator::ripupPerpandicular(), when a caged perpandicular
is encountered, instead of just "stopping", rip it up and change is
axis hint (actually increase) it's axis hint so it stands a chance to
go outside the track with an obstacle.
- Change: In RoutingEvent/State::slackenTopology(), allow move up of local
segments when they are tightly constrained *and* blocked (cageds).
Partial modification of functions calls from booleans to flags.
- Bug: In NegociateWindow::NegociateOverlapCost, check for fixed segments
before trying to get DataNegociate. The lack of DataNegociate cause the
TrackElement to be discarted. It's a failsafe behavior, but it leads to
overlaps.
- Bug: In ProtectRoutingPad, in Pad Cells only, *do not* protect RoutingPad
to avoid the edge capacity over the pad to decrease to zero. This is
due to unused RoutingPads being accounted as blockages.
2010-12-04 09:25:48 -06:00
|
|
|
continue;
|
2015-05-26 07:31:38 -05:00
|
|
|
if (_configuration->isGMetal(layer)) continue;
|
|
|
|
|
if (not query.hasBasicLayer(layer)) continue;
|
* ./kite:
- New: In BuilPowerRails & BuildBlockage, specific support for chip-level
design. The Alliance "top chip" design hierarchical structure is
hard-coded. Top level POWER/GROUND/CLOCK nets must always have the
<vsse>, <vdde>, <ck>, <vssi>, <vddi>, <ckc>, <cki> names.
Specific method to get trans-hierarchical root nets, espcially in
case of global ones (POWER/GROUND). Clock is *not* global.
Some correction in the manner obscured tracks are computeds.
- New: ProtectRoutingPad module that perform a more clean work for protecting
unused RoutingPad.
- Bug: In BuildPowerRails, uses stable_sort<> instead of sort<>, which
causes unexplained core dumps (seems to try to perform a comparison
using the "end" pseudo element). Already occured in Knik, no explanation
other than a STL bug.
- Change: Slight changes in the weights to move up. Now needs a full empty
track instead of a half one.
2010-11-16 08:00:03 -06:00
|
|
|
|
2015-05-26 07:31:38 -05:00
|
|
|
query.setBasicLayer( layer );
|
2013-12-03 18:59:29 -06:00
|
|
|
query.doQuery ();
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
2013-12-03 18:59:29 -06:00
|
|
|
query.ringAddToPowerRails();
|
|
|
|
|
query.doLayout();
|
2010-03-09 09:24:55 -06:00
|
|
|
cmess1 << " - " << query.getGoMatchCount() << " power rails elements found." << endl;
|
|
|
|
|
|
2015-06-06 11:22:48 -05:00
|
|
|
vector<GCell*>& gcells = *(getGCellGrid()->getGCellVector());
|
|
|
|
|
for ( auto gcell : gcells ) {
|
|
|
|
|
gcell->truncDensities();
|
|
|
|
|
}
|
|
|
|
|
|
2010-03-09 09:24:55 -06:00
|
|
|
Session::revalidate ();
|
Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 06:13:17 -06:00
|
|
|
|
|
|
|
|
//DebugSession::close();
|
2010-03-09 09:24:55 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2013-12-03 18:59:29 -06:00
|
|
|
} // Kite namespace.
|
